12-13-2017 01:40 AM - edited 12-13-2017 01:42 AM
Hi guys,
Just realize that zcu102 board has ddr on pl side. How to let hardware accelerators use this piece of memory in sdsoc?
Reimond
01-17-2018 10:30 AM
A few things worth noting here:
1- Linux isn't going to view the MIG-controlled memory as any different than the PS DDR, if the PS has access to the MIG space. This has the potential to impact things if linux decides to allocate things in one as opposed to the other, since it really does make a big difference which of the two memory sources an accelerator is facing. For example, if you just malloc something, you're capable of getting memory that is mapped to both the ps DDR and the pl DDR, which would make sensible configuration of a SG-DMA impossible [since it is capable of coping with malloc'ed data].
2- On linux, sds_alloc pulls from the linux cma, which is going to be put where ever linux wants. As such, there isn't a lot you can do to demand that sds_alloc end up being pl-ddr backed as opposed to ps-ddr backed.
3- There are going to be substantial performance differences between the ps accessing ps-ddr, and the ps accessing pl-ddr.
4- Because of the above problems, we generally see users of pl-DDR build systems that don't expose that memory to linux, and internalize the management of addressing/allocation to that space.
5- If a user owns the pl-ddr entirely, linux has no awareness of it, but the ps does still have connectivity to it, it's still possible to access it from the ps via /dev/mem, and to use sds_mmap to associate it for use by accelerators.
12-13-2017 08:54 AM
Yes, if you have a Vivado project with the PL DDR that you have tested. You can create a platform for this.
you need to declare the slave port as memport 'MIG' and provide the ddr IP memory instance and mapped address segment in the PFM.AXI_PORT API.
This is documented in UG1146:
12-13-2017 05:36 PM
12-14-2017 07:50 AM
Yes, if you are using a linux OS, you would need to update the DTS:
/ {
amba_pl: amba_pl {
#address-cells = ;
#size-cells = ;
compatible = "simple-bus";
ranges ;
mig_7series_0: memory-controller@40000000 {
compatible = "xlnx,mig-7series-2.3";
device_type = "memory";
reg = <0x40000000 0x40000000>;
};
};
};
12-25-2017 04:01 AM
01-17-2018 10:30 AM
A few things worth noting here:
1- Linux isn't going to view the MIG-controlled memory as any different than the PS DDR, if the PS has access to the MIG space. This has the potential to impact things if linux decides to allocate things in one as opposed to the other, since it really does make a big difference which of the two memory sources an accelerator is facing. For example, if you just malloc something, you're capable of getting memory that is mapped to both the ps DDR and the pl DDR, which would make sensible configuration of a SG-DMA impossible [since it is capable of coping with malloc'ed data].
2- On linux, sds_alloc pulls from the linux cma, which is going to be put where ever linux wants. As such, there isn't a lot you can do to demand that sds_alloc end up being pl-ddr backed as opposed to ps-ddr backed.
3- There are going to be substantial performance differences between the ps accessing ps-ddr, and the ps accessing pl-ddr.
4- Because of the above problems, we generally see users of pl-DDR build systems that don't expose that memory to linux, and internalize the management of addressing/allocation to that space.
5- If a user owns the pl-ddr entirely, linux has no awareness of it, but the ps does still have connectivity to it, it's still possible to access it from the ps via /dev/mem, and to use sds_mmap to associate it for use by accelerators.