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Observer
Observer
109 次查看
注册日期: ‎07-09-2020

Vitis-AI DPU_TRD 复现工程时出现问题

复现Vitis-AI DPU_TRD中的Vivado platform过程中出现错误以及大量警告

WARNING: [BD 41-2384] Width mismatch when connecting pin: '/hier_dpu/hier_dpu_ghp/dpu_intc_M_AXI_LPD/xbar/s_axi_awid'(3) to pin: '/hier_dpu/hier_dpu_ghp/dpu_intc_M_AXI_LPD/s00_couplers/M_AXI_awid'(2) - Only lower order bits will be connected. WARNING: [BD 41-2384] Width mismatch when connecting pin: '/hier_dpu/hier_dpu_ghp/dpu_intc_M_AXI_LPD/xbar/s_axi_arid'(3) to pin: '/hier_dpu/hier_dpu_ghp/dpu_intc_M_AXI_LPD/m00_couplers/S_AXI_bid'(6) - Only lower order bits will be connected. WARNING: [BD 41-2384] Width mismatch when connecting pin: '/hier_dpu/dpu/dpu1_m_axi_instr_bid'(6) to pin: '/hier_dpu/hier_dpu_ghp/DPU1_M_AXI_INSTR_bid'(3) - Only lower order bits will be connected.

并在最终export hardware 时出现如下错误

ERROR: [BD 41-2088] No default platform clock is selected. Please set property is_default to true for one of the platform clocks
ERROR: [Project 1-1038] Failed to generate hpfm file for BD File: /home/vitis/Vitis-AI/DPU-TRD/prj/Vivado/srcs/top/top.bd
ERROR: [Common 17-53] User Exception: Unable to get hpfm file from project property platform.hpfm_file or from the BD itself.

 复现过程log在附件中,希望能够得到解答

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Moderator
Moderator
37 次查看
注册日期: ‎07-17-2008

你是尝试的Vivado Flow还是Vitis Flow?

 

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