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Visitor podd
Visitor
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Registered: ‎07-30-2018

Retargetting C-Callable Library example onto ZCU102 board

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Hi,

 

I am trying to get to grips with being able to package HDL in Vivado IP Packager for use as a C-Callable Library within SDSoC and have successfully got the example to work for the zc702.

 

I would like to get the same example to work for the zcu102 board as this is the hardware i have access to. I have tried putting the same verilog sources and constraints into vivado and packaging for compatibility with the zcu102 board but i have not been able to successfully implement it as a C-Callable library.

 

The closest i got was a build that got most of the way through synthesis and failed on a hold time violation.

 

Is there a solution for retargetting the array copy example from this guide:

https://www.xilinx.com/html_docs/xilinx2018_2/sdsoc_doc/c-callable-libraries-zah1504034388097.html

 

to be compatible with the zcu102 board?

 

Harry

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Xilinx Employee
Xilinx Employee
776 Views
Registered: ‎10-28-2013

Re: Retargetting C-Callable Library example onto ZCU102 board

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Hi @podd,

 

For the GUI flow, did you mark support for MPSoC, or was it only providing the default of Zynq?

 

Is this the axilite_arraycopy sample from the install area (the command you use looks like it, but if you can confirm that would be great)?

 

 

Look at the IP's component.xml file (ip/component.xml) and search for "supportedFamilies". If it lists only 1 part, then that means the IP generated will only support platforms and devices that use that part. If you're savvy with modifying IP component.xml, you can fix this yourself, but it is not a supported flow of modifying the component.xml outside of Vivado. This is mostly due to how the IP is created. For an example, if an IP uses specific features of Zynq Ultrascale+ MPSoC that are not in the Zynq-7000, then that means you cannot make modifications without running into compiling issues.

 

Thanks

Steve

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4 Replies
Xilinx Employee
Xilinx Employee
813 Views
Registered: ‎10-28-2013

Re: Retargetting C-Callable Library example onto ZCU102 board

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Hi @podd,

 

C-Callable Library uses a packaged IP from Vivado. This means that in the Vivado IP Packager you select the family of devices you want use, so for your case, you want to use Zynq-7000 and Zynq MPSoC devices in the IP. From there, you can use sdx_pack to specifically target one of the devices (you can always re-run sdx_pack with a different part, but as long as the packaged IP you created contains both Zynq devices, you should be fine).

 

Hope that helps.

 

Steve

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Visitor podd
Visitor
791 Views
Registered: ‎07-30-2018

Re: Retargetting C-Callable Library example onto ZCU102 board

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Hi @sgrace,

 

I have tried to recreate the example implementation and to use sdx_pack to create the library. Beforehand I was using the sdx gui and it successfully created the example library.

 

Creating it with the sdx_pack command:

 

/APPS/Xilinx/2018.2/SDx/2018.2/bin/sdx_pack -header arraycopy.hpp -lib libarraycopy.a -func arraycopy -map A=A:in -map B=B:out -map M=s_axi_lite:in:16 -func-end -ip ../ip/component.xml -control AXI=s_axi_lite:0 -target-family zynq -target-cpu cortex-a9 -target-os standalone

 

I am getting the following error:

 

ERROR: [SdxPack 83-5812] Exiting sdx_pack : Error when calling 'sds++ -c -sds-hw arraycopy /home/T0202517/AXI/arraycopy/src/src/.Xil/rtl/arraycopy.cpp -ip-map /home/T0202517/AXI/arraycopy/src/src/.Xil/rtl/arraycopy.all.fcnmap.xml -vlnv xilinx.com:rtl:arraycopy:1.0 -ip-params /home/T0202517/AXI/arraycopy/src/src/.Xil/rtl/arraycopy.all.params.xml -ip-repo /home/T0202517/AXI/arraycopy/src/ip  -target-os standalone -target-cpu cortex-a9 -sds-end -sdslib /home/T0202517/AXI/arraycopy/src/src/.Xil/rtl/arraycopy.cpp -I/home/T0202517/AXI/arraycopy/src/src -o /home/T0202517/AXI/arraycopy/src/src/.Xil/sdx/arraycopy.o'

 

As well as this, is there a clear way to be able to repackage the example in Vivado to work with a zynquplus device?

 

Thanks,

 

Harry

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Xilinx Employee
Xilinx Employee
777 Views
Registered: ‎10-28-2013

Re: Retargetting C-Callable Library example onto ZCU102 board

Jump to solution

Hi @podd,

 

For the GUI flow, did you mark support for MPSoC, or was it only providing the default of Zynq?

 

Is this the axilite_arraycopy sample from the install area (the command you use looks like it, but if you can confirm that would be great)?

 

 

Look at the IP's component.xml file (ip/component.xml) and search for "supportedFamilies". If it lists only 1 part, then that means the IP generated will only support platforms and devices that use that part. If you're savvy with modifying IP component.xml, you can fix this yourself, but it is not a supported flow of modifying the component.xml outside of Vivado. This is mostly due to how the IP is created. For an example, if an IP uses specific features of Zynq Ultrascale+ MPSoC that are not in the Zynq-7000, then that means you cannot make modifications without running into compiling issues.

 

Thanks

Steve

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Visitor podd
Visitor
764 Views
Registered: ‎07-30-2018

Re: Retargetting C-Callable Library example onto ZCU102 board

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Hi Steve,

This is the axis_arraycopy sample from the install area.

Thanks
Harry
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