UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Contributor
Contributor
98 Views
Registered: ‎06-20-2019

SDSoC Viterbi Decoder implementation

Hi everyone,

I have been trying to create "viterbi decoder C callable ip". What I am doing is that I am creating block design on VIVADO environment, create an HDL wrapper for it and then synthesize. Later I package the IP and create a static library .a file by using the outputting .xml file, a header file and Makefile. Since it is not possible to reach to what is included in .a file directly, I tried to generate .so file that reaches to that .a file. I was planning to call it by the client code such as main. Yet, I am seeing that datamover is being a problem. The error states that sideband TLAST signal is missing and it is needed by the SDSoC datamover. The viterbi IP doesn't include that signal and I have added it to HDL wrapper since it might work this way. Yet, I am observing another error and it is also about datamover which is actually I expected but i still tried. Is there a way out? Can't I make an IP C callable without sideband signals, TLAST/TKEEP?

 

Thank you for your time.

0 Kudos