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Visitor bklna
Visitor
346 Views
Registered: ‎05-09-2019

AXI GPIO Address

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Dear all,

I am using Vivado without a Block Design. When I add IP (e.g. AXI BRAM Controller), I can manually define the address range for the AXI bus (e.g. 0x400400). However, when using the AXI GPIO IP fromt he IP catalog, there is no possibility to set the address.

When using a Block Design, I can obtain the address in the address editor. As I don't have a Block Design, I also do not have the address editor. Anyway, I want to set the AXI address of the GPIO IP myself, how can I do this?

Cheers

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Moderator
Moderator
270 Views
Registered: ‎02-09-2017

Re: AXI GPIO Address

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Hi @bklna,

 

Thank you for contacting about this issue. very interesting question.

The address is actually set in the AXI Interconnect, not it the AXI GPIO IP. 

IF you have an AXI Interconnect with two or more output (MM) AXI ports, then you have the option to select and address for each of them, which in consequence will be routed to the IPs connected to them.

The problem is, there are two different IPs for the AXI Interconnect: One to be used only with the Block Design and another to be used with HDL.

The one for HDL code (which is the one you would use in this case) is a deprecated IP and does not support multiple output ports. So in fact, you cannot do it.

I talked to another AXI specialist and I was informed that the recommended flow is to use the Block Design.

Is there a specific reason why you'd need to not use it? Please let us know so we can try to find a solution.

 

Thank you,

Andre Guerrero

Product Applications Engineer

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Moderator
Moderator
271 Views
Registered: ‎02-09-2017

Re: AXI GPIO Address

Jump to solution

Hi @bklna,

 

Thank you for contacting about this issue. very interesting question.

The address is actually set in the AXI Interconnect, not it the AXI GPIO IP. 

IF you have an AXI Interconnect with two or more output (MM) AXI ports, then you have the option to select and address for each of them, which in consequence will be routed to the IPs connected to them.

The problem is, there are two different IPs for the AXI Interconnect: One to be used only with the Block Design and another to be used with HDL.

The one for HDL code (which is the one you would use in this case) is a deprecated IP and does not support multiple output ports. So in fact, you cannot do it.

I talked to another AXI specialist and I was informed that the recommended flow is to use the Block Design.

Is there a specific reason why you'd need to not use it? Please let us know so we can try to find a solution.

 

Thank you,

Andre Guerrero

Product Applications Engineer

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

View solution in original post

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