08-20-2018 06:28 AM
I am performing division between 16 bit (numerator) and 32 bit (denominator) variables. It is getting simulated in model sim. But I'm unable to insert few MSB bits in chipscope inserter, as they are not visible to make connections.
Also I want to know what will be the bit width of result after performing division operation?
08-20-2018 06:55 AM - edited 08-20-2018 06:56 AM
The bit width of an integer division can be anywhere between zero (eg. 0/1 = 0, technically no bits required) and infinity (eg. 1/0 = infinity, infinite bits required). Normally you'd make the output width the same as the numerator width, since there's only one case where it'll exceed that; however if you're using fixed-point then a longer output may be required.
While Vivado can actually build a divider for you, it's rarely a good idea to use that - combinational division is very large and very slow. Much better to write your own sequential one that produces as many bits as you desire and also provides an overflow flag when the output would exceed that length.
08-20-2018 12:57 PM - edited 08-20-2018 12:59 PM
Been a long day, and brain fuzzy, but
Is not a divide the same rules as a multiply in terms of number of bits,
if you multiple a 10 bit word by a 16 bit word, then you get 26 bits.
If the 16 bit word is the 1/x of the number, thats a divide,
So the vhdl output would always be a 26 bit output.
08-21-2018 03:01 AM
@drjohnsmith Unfortunately not.
If you're doing integer division, then the quotient value can be no more than the dividend value, unless it's infinity. As such, just keeping the same number of bits as the dividend is fine.
If you're accepting fractional results, then the maximum length is infinity - the obvious decimal example is 1/3 = 0.333333333333333333333333333333333333333333333333333333333333333 and so on. In binary you can get this just by doing 1/10.
08-21-2018 04:02 AM
you say "keep ing"
What about the calculation , how many bits in that ?
08-21-2018 06:41 AM
I'd have to dis agree with you @u4223374