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Explorer
Explorer
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Registered: ‎11-28-2011

Debug Bridge TCK Clock Ratio setting

PG245 doesn't make it clear how to derive the TCK Clock Ratio. Is it even applicable in the From_PCIE_to_BSCAN mode given that there is not physical JTAG lines? Otherwise, I assume it make sense that it would be System_Clock/TCK Clock Ratio = JTAG Speed, i.e. 3MHz, 1.5MHz, etc. 

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Moderator
Moderator
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Registered: ‎02-09-2017

Re: Debug Bridge TCK Clock Ratio setting

Hi @polyee13,

 

In PCIe-to-BSCAN mode (or also AXI-to-BSCAN), the TCK is derived from the PCIe (or AXI) clock by dividing it by 8.  The TCK clock also needs to be at least 2.5x slower than the Debug Hub clock (this is important for debug bridge IPs configured as BSCAN-to-Debug Hub mode).

Thanks,

Andre Guerrero

Product Applications Engineer

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