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Contributor
Contributor
6,423 Views
Registered: ‎06-28-2016

Error when using ILA core

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Hello, i like to learn debugging and so i add an ila-core to my design. After i created my design, i got the following System error message: " [Common 17-70] Application Exception: Failed to stitch checkpoint 'c:/Projekte/TestDebug/TestDebug.srcs/sources_1/bd/system/ip/system_DataSink_0_0/system_DataSink_0_0.dcp' at cell 'system_i/DataSink_0'." when i try to open the "synthesized design". Can somebody please tell me, what i have to do? I like to debug the Signal "q -> d" in my design (see attachment). I'am using an arty-board. Thank you, regards.
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Moderator
Moderator
11,674 Views
Registered: ‎07-01-2015

Re: Error when using ILA core

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Hi @deppenkaiser,

 

  1. Remove system ILA from the design.
  2. Then add ILA from IP catalog and do the required connection. Please go through page-105 and 106 of https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_2/ug994-vivado-ip-subsystems.pdf
Thanks,
Arpan
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Moderator
Moderator
6,418 Views
Registered: ‎07-01-2015

Re: Error when using ILA core

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Hi @deppenkaiser,

 

Is there any specific reason behind using system ILA?

Can you please try with ILA only? Which Vivado version you are using?

Thanks,
Arpan
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Moderator
Moderator
6,395 Views
Registered: ‎09-15-2016

Re: Error when using ILA core

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Hi @deppenkaiser,

 

Please debug using the steps mentioned in the accepted solution post in this forum thread and check if it helps: https://forums.xilinx.com/t5/Welcome-Join/ERROR-Common-17-70-Application-Exception-Failed-to-stitch/td-p/663625.

 

Since you are learning debugging, UG936 tutorial in debugging is always helpful: https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_4/ug936-vivado-tutorial-programming-debugging.pdf

 

Thanks & Regards,
Prathik
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Contributor
Contributor
6,390 Views
Registered: ‎06-28-2016

Re: Error when using ILA core

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Hello arpansur,

 

i'am using "Vivado 2016.4". I used "system ila", because i right click on a signal and select "Debug". My earlier experience was, that this is possible and meaningfull to debug on Hardware. But i saw, that i should have more practice; so i tried a most simple design to have a good overview about debugging possibilities. Now, with this "simple design" i have Problems.

 

I need only a simple design where i can get some expirences.

 

Regards

 

 

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Moderator
Moderator
6,387 Views
Registered: ‎07-01-2015

Re: Error when using ILA core

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Hi @deppenkaiser,

 

As you are seeing crash issue can you please try adding ILA instead of system ILA? Also you can use setup debug after synthesis to insert ILA.

Thanks,
Arpan
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Contributor
Contributor
6,386 Views
Registered: ‎06-28-2016

Re: Error when using ILA core

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Hi prathikm, i can't open the pdf, so i will try it later again. I made a microblaze design and i need to debug it. But i do not undestand the meaning of the many signals that i am able to select. I like to see the axi bus timing. So i want to get more practice and - therefore i can learn - i make a smaller design with a simple logic. But i get this error message...

regards
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Contributor
Contributor
6,382 Views
Registered: ‎06-28-2016

Re: Error when using ILA core

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Hello arpansur,

 

i made a screenshot, so you can see what happens when i click on "Synthesis->Open Sythesized Design->Set up Debug".

 

You told me, that i can use "ILA" instead of "System ILA". Should i select it in the IP-Repository? I never did it before :-)

 

regards

ILA Error.png
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Moderator
Moderator
11,675 Views
Registered: ‎07-01-2015

Re: Error when using ILA core

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Hi @deppenkaiser,

 

  1. Remove system ILA from the design.
  2. Then add ILA from IP catalog and do the required connection. Please go through page-105 and 106 of https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_2/ug994-vivado-ip-subsystems.pdf
Thanks,
Arpan
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