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Visitor e.charre
Visitor
6,592 Views
Registered: ‎02-06-2010

FPGA pin toggle via boundary scan

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Hello,

 

I am looking for a solution to toggle a FPGA pin using JTAG probe.

I am developping with ISE 9.2.04i and the target is a Virtex II : XC2V1500.

The pin I want to test is "INIT_B", so I cannot make a design to test it. So, I'd like to use JTAG way.

 

Can I use iMPACT to execute a SVF file [edit] using batch command [/edit]?

If YES, could you give me an example of SVF file ?

Else, is another way is possible to toggle a pin, only using Xilinx tools ?

 

Thank's

 

Emmanuel.

Message Edited by e.charre on 02-08-2010 09:27 AM
Message Edited by e.charre on 02-08-2010 09:28 AM
Message Edited by e.charre on 02-08-2010 09:31 AM
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Visitor zgora
Visitor
8,266 Views
Registered: ‎08-12-2009

Re: FPGA pin toggle via boundary scan

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You can sample and drive pins via boundary-scan using TopJTAG Probe http://www.topjtag.com/probe/ software. It's not a Xilinx software, however, it can work with Xilinx parallel port cables and some other USB cables.

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Visitor zgora
Visitor
8,267 Views
Registered: ‎08-12-2009

Re: FPGA pin toggle via boundary scan

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You can sample and drive pins via boundary-scan using TopJTAG Probe http://www.topjtag.com/probe/ software. It's not a Xilinx software, however, it can work with Xilinx parallel port cables and some other USB cables.

View solution in original post

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Visitor e.charre
Visitor
6,547 Views
Registered: ‎02-06-2010

Re: FPGA pin toggle via boundary scan

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VERY NICE !!

 

Thank's for this link, it is exactly what we need, with a very little price.

 

Do you know a software like this one which intergrate ATE function (Automatic Test Equipment) like "XJTAG" but compatible with Xilinx probe ?

 

Thank's again.

 

Emmanuel.

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