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Adventurer
Adventurer
143 Views
Registered: ‎01-26-2017

How to estimate the power comsuption of 7 FPGA before fix the design?

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This is a new A7 FPGA design without any previous reference. It is also a size compact project so that the power unit should be as small as possible. 

It is very hard to fix the final logic developments of FPGA during PCBA design, so it is necessary to estimate the power comsuption of every power rails: core,io,gtp.

I just find on other semi company's website about the solution of this with max, mid and min current. Are these any method to have a correct estimation before logic design?  

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Adventurer
Adventurer
132 Views
Registered: ‎07-16-2009

Re: How to estimate the power comsuption of 7 FPGA before fix the design?

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Hi @rggber ,

 

https://www.xilinx.com/products/technology/power/xpe.html

 

You can download excel spredsheet from Xilinx webpage and it allows you to estimate power consumptions from estimation of the design you provide.

Jan

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Adventurer
Adventurer
133 Views
Registered: ‎07-16-2009

Re: How to estimate the power comsuption of 7 FPGA before fix the design?

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Hi @rggber ,

 

https://www.xilinx.com/products/technology/power/xpe.html

 

You can download excel spredsheet from Xilinx webpage and it allows you to estimate power consumptions from estimation of the design you provide.

Jan

View solution in original post

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Guide avrumw
Guide
115 Views
Registered: ‎01-23-2009

Re: How to estimate the power comsuption of 7 FPGA before fix the design?

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Just to add some information...

Most "off the shelf" components have only one or a small number of functional modes. The vendor of these components can characterize the power consumption for these functional modes at the maximum frequency permissible for the device and generate publishable numbers for power.

An FPGA is different - it is "Field Programmable". The power consumption is very highly dependent on the function programmed into the FPGA - you can get power values that can change over a range that is certainly over 100:1 and probably even more (1000:1). As a result, it is not possible to publish a single number that gives the user any information about how much power the FPGA will consume in their application.

As a result, more sophisticated mechanisms are required. Depending on the stage of your FPGA design, you can get increasingly precise numbers. Before you start the design, you can work with the power analyzer spreadsheet - you estimate which and how many resources you expect your FPGA design to use, the frequency of the clocks, and the activity rate of the switching (the latter being quite hard to get precise), and it will tell you the power consumption (including the power consumed on each rail). Later on, once your FPGA is designed, you can extract the resource utilization from the tools and us that for power analysis. Even later than that, you can run post-place and route simulations to extract the activity levels and let the tool calculate the power consumption. Finally, the device has temperature sensors built-in (and some even have analog to digital converters built in) so that you can measure the die temperature directly once your design is running "in system".

Avrum