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Newbie
Newbie
11,063 Views
Registered: ‎02-15-2016

How to handle the interrupt signal of an IP when integrating with Zynq (Vivado)

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I am using Vivado to start a block level design with Zynq, and 16550 UART.  Finally, I will use PetaLinux, so I assume Linux can handle the interrupt from uart.

 

The IP core has an interrupt pin so I am wondering where to connect this interrupt pin to?  After I did the auto connection, the AXI bus signals were connected, but not this ip2intc_irpt. 

 

Another question is, if I have 10 such uarts, how to connect the interrupt?  I would like to start with just one, but finally I may need 10.

 

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Xilinx Employee
Xilinx Employee
21,063 Views
Registered: ‎08-02-2007

hi,

 

to integrate a IP with an interrupt, please refer to the following link. https://forums.xilinx.com/xlnx/attachments/xlnx/EDK/32012/1/AR60837.pdf

 

if you have multiple interrupts from different UART's, you can use the concat block.

http://www.xilinx.com/support/answers/58942.html

 

--hs

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Xilinx Employee
Xilinx Employee
21,064 Views
Registered: ‎08-02-2007

hi,

 

to integrate a IP with an interrupt, please refer to the following link. https://forums.xilinx.com/xlnx/attachments/xlnx/EDK/32012/1/AR60837.pdf

 

if you have multiple interrupts from different UART's, you can use the concat block.

http://www.xilinx.com/support/answers/58942.html

 

--hs

----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------

View solution in original post

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Newbie
Newbie
10,710 Views
Registered: ‎02-15-2016

Thank you and it should be marked as answered however i don't know how to do it.

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