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Adventurer
Adventurer
890 Views
Registered: ‎06-09-2016

How to trigger and capture only on change in Vivado

Hello,

I´ve seen it's possible to do this on chipscope but didn't found the way to do it in vivado ILA because you can set up to capture 1bit bus width signals in both transitions but this is not possible for bus signals due the limit numbers of comparators.

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Moderator
Moderator
861 Views
Registered: ‎02-09-2017

Re: How to trigger and capture only on change in Vivado

Hi @jmartinez ,

 

I'm sorry, I did not understand exaclty what you are trying to do. could you please clarify? What do you mean with "trigger and capture only on change"?

If you could exemplify how you would like to trigger, on what signals, how many times, etc., it would be great to help us understand the use case better.

Thanks,

Andre Guerrero

Product Applications Engineer

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Adventurer
Adventurer
848 Views
Registered: ‎06-09-2016

Re: How to trigger and capture only on change in Vivado

hi @anunesgu,

something like this https://forums.xilinx.com/t5/Design-Tools-Others/How-to-trigger-and-capture-only-on-change/m-p/268342#M3539 but in Vivado instead of chiscope.

I want to capture the behavior of a module capturing the data ports(valid,enable,rst,datain dataout...) when running in hardware. for this reason I try to capture the signals only on change(due the length limitation of the ILA window) and with the help of a timer reconstruct the timimg behavior to be able to simulate it to understand what's happening.

For 1 bit signals this is easy due its posible to trigger in capture window for both transitions but for data bus signals I only can compare it with values and if I try to descompose the signals in bits the vivado give me one error in the capture window due the number of comparators is limited.

Moderator
Moderator
782 Views
Registered: ‎02-09-2017

Re: How to trigger and capture only on change in Vivado

Hi @jmartinez ,

 

Since Vivado is limiting on the number of comparators, you can do three things:

  • When creating the ILA, you can choose a value for "Number of Comparators". This is always set to the minimum (for saving memory space) but you can increase it if you need.
  • The ILA also have the storage qualification feature, which can be enabled when implementing the ILA. Please take a look at the document Integrated Logic Analyzer v6.2 - PG172, pg. 9.
  • Maybe you'll be better of using an Advanced Trigger instead. This will give you access to a few special registers that you can use to count and compare events. There's an explanation and example on how to use this in the document Vivado Programming and Debugging - UG908 (v2018.3), Appendix B, pg. 320.

Thanks,

 

Andre Guerrero

Product Applications Engineer

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Adventurer
Adventurer
626 Views
Registered: ‎06-09-2016

Re: How to trigger and capture only on change in Vivado

thanks @anunesgu  for replay and sorry for be so late.

Regarding your response:

"When creating the ILA, you can choose a value for "Number of Comparators". This is always set to the minimum (for saving memory space) but you can increase it if you need."

It says the maximum number of comparators for signal is 16, what it means?, you can only compare a bus signal with 16 values? you can capture a bus of maximum 16 bits width?.

"The ILA also have the storage qualification feature"

This is the capture mode option? it only works with binary signals(capture in both transitions) not buses due is not possible to setup a bus to capture any transition in signal value.

"Maybe you'll be better of using an Advanced Trigger instead. This will give you access to a few special registers that you can use to count and compare events."

With advanced trigger I can store the value of a signal bus to use it as a trigger for capture? also the trigguer option has a minimun 2 sample window so I have an extra sample for each capture.

Regards.

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Visitor michalzaczek
Visitor
108 Views
Registered: ‎05-23-2018

Re: How to trigger and capture only on change in Vivado

I know it's an old topic, but maybe someone else will find it usefull. In Chipscope and Vivado debug the way to capture only on change = only different values (to not get samples of the same value filling capture memory) you only need to set the capture condition to (binary)  "NNNNNNNN...NN" which means no change in signal for every bit of it and then the operator to !=, which gives you storing only samples that aren't the same as adjacent ones.

Another trick you can use to fill the memory of a capture in case too little data gets qualified by mentioned condition is to set the main operator to OR and add another condition to capture a sample every N clocks. In Chipscope you can do it by setting up the IP-core with a counter for some signal and then in Analyser setting that counter to count exactly N events of "XXX...XX", which is true every N clocks no matter what's the valuse of the signal with the counter. In Vivado debug (which is in most cases far worse than ISE Chipscope !!!) you need to make a counter in your HDL and connect it as a probe but as trigger only (to not waste memory for it). Then you setup the main operator for OR also and set that counter value to e.g. "XXX...XX00" or "XX...X000" which gives you every fourth or every eighth sample. This is also a way to view what happens in longer stretches of time but sacrificing on resolution.

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