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Adventurer
Adventurer
825 Views
Registered: ‎03-03-2014

JTAG to AXI Master issue

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Hi,

I want to drive a custom IP with AXI Lite access for test purpose.

As the JTAG2AXI can't be simulated, for bring up I added a Microblaze to verify that everything is fine with AXI Lite access on my IP.

So I have (JTAG2AXI IP + Microblaze subsystem) => AXI IC => my IP.

When I use the Microblaze in simulation or on board everything is fine.

When I use the JTAG2AXI on the board rd or wr access generate an error in the Vivado's tcl console.

(ERROR: [Xicom 50-38] Xicom: AXI TRANSACTION FAILED)

I added an ILA on the JTAG2AXI's AXI output bus and there is no activity.

 

My design is driven by a MMCM to provide the global clock with 62.5Mhz, and the global reset is (not locked) from the MMCM. I inverted the reset for the JTAG2AXI to have it active low.

That's quite simple but it does not work !

Any help on what to check, what it did wrong ??

Thanks.

Stephane.

 

 

 

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Adventurer
Adventurer
759 Views
Registered: ‎03-03-2014

Re: JTAG to AXI Master issue

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Hi,

Ok, I solved it !

The AXI Lite output of the JTAG2AXI seems to be more restrictive than the one from an Interconnect !

Because I had to modify my AXI Lite slave interface design to make it work with the JTAG2 AXI even when it worked fine with a Microblaze through an interconnect.

Regards,

Stephane

 

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Moderator
Moderator
813 Views
Registered: ‎04-18-2011

Re: JTAG to AXI Master issue

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have you got another AXI peripheral you can try to access?
What about a simple build with just your custom IP and the JTAG2AXI core?
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Adventurer
Adventurer
807 Views
Registered: ‎03-03-2014

Re: JTAG to AXI Master issue

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I forced the reset of the JTAG2AXI IP to inactive (1) and the behavior changed !

Now the AW channel behaves properly, but the W channel does not do the handshake !

So is there any reset generation constraint ?

Thanks !

Stephane.

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Adventurer
Adventurer
760 Views
Registered: ‎03-03-2014

Re: JTAG to AXI Master issue

Jump to solution

Hi,

Ok, I solved it !

The AXI Lite output of the JTAG2AXI seems to be more restrictive than the one from an Interconnect !

Because I had to modify my AXI Lite slave interface design to make it work with the JTAG2 AXI even when it worked fine with a Microblaze through an interconnect.

Regards,

Stephane

 

View solution in original post

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