11-11-2020 02:16 AM
Hello,
I insert two System ILA on my design to debug and monitor some internal signals inside a Zynq. I modified the debug hub core to select the same clock that I've used for the System ILA (modifications shown below).
I attach to this message the report of debug core.
When I program my FPGA, I use the Hardware Manager to debug the internal signals, but I have the following message.
refresh_hw_device [lindex [get_hw_devices xc7z035_1] 0]
INFO: [Labtools 27-1434] Device xc7z035 (JTAG device index = 1) is programmed with a design that has no supported debug core(s) in it.
WARNING: [Labtools 27-3361] The debug hub core was not detected.
Resolution:
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
WARNING: [Labtools 27-3413] Dropping logic core with cellname:'inst_n310_ps/system_ila_1/inst/ila_lib' at location 'uuid_3A0521E096A754FA831B090EF91BE0CD' from probes file, since it cannot be found on the programmed device.
WARNING: [Labtools 27-3413] Dropping logic core with cellname:'inst_n310_ps/system_ila_0/inst/ila_lib' at location 'uuid_69543DFB73F65EBDAB01C7973A229BB4' from probes file, since it cannot be found on the programmed device.
I launch on SDK a Hello World application, but it doesn't make that the System ILA appears on the Hardware Manager. Could someone help me to use the System ILA?
Thanks a lot for your help.
D.
11-11-2020 08:49 AM
Hi @dijura
You might want to read the following article. What you are seeing in mentioned in it:
11-11-2020 08:49 AM
Hi @dijura
You might want to read the following article. What you are seeing in mentioned in it:
12-15-2020 02:57 AM
Hi @florentw
Thanks a lot for the link, it helped me to debug my system. I learnt different ways to debug internal signals.
Regards,
D.