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dps
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Registered: ‎06-16-2017

Platform Cable USB II

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Hi,

 

I'm designing a board with Zynq XC7Z007S-1CLG400C and need to make provision for JTAG programming/debug.  I want to use Xilinx's Platform Cable USB II but I'm not sure of the following:

 

1) Where do I connect the "HALT" signal?  Does it go to PS_SRST_B_501?

 

2) The system will be powered.  Do I still need to connect VREF to my board?  If so, to what voltage?

 

Thanks in advance for your help!

-Dan

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pratham
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@dps  https://www.xilinx.com/support/documentation/data_sheets/ds593.pdf

-Pratham

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pratham
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#1 No.
#2 Check the datasheet.

You may refer ZC702 or ZC706 schematic as a reference.
-Pratham

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dps
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Hi Pratham,

 

Thanks for the reply.  Page 23 of the datasheet says that Vivado does not support the use of HALT.  But if I was using some other debug environment (Impact) that supported it, I'm still not sure where to connect HALT.  The schematics that you pointed me to are not easy to follow.

 

It sounds like I don't need this signal for my application, but I'd still like to know what other people typically do with this signal.

 

Thanks,

Dan

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pratham
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@dps  https://www.xilinx.com/support/documentation/data_sheets/ds593.pdf

-Pratham

----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

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dps
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Hi Pratham,

 

Thanks for your help!

 

Dan

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