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Registered: ‎11-10-2019

Regarding PCB Decoupling capacitors for Virtex 7

Hii Everyone,

I am using virtex 7 "XC7VX485T-2FFG1927I-ND". We  will use all the GTX Bank and 90 utilization of FPGA. As per Power estimation tool, we have calculated the current requirement as follows:

VCCint(1v):- 32A

VCCBram(1v):- 1A

VCCAUX(1.8v):- 1.5A

VCCAUX_IO(2v):-0.3A

VCCO(1.8v):-0.3A

MGTAVCC(1v):10A

MGTAVTT(1.2v):-4.313A

MGTAVCC_AUX(1.8v):-0.2A

We have generated all these supplies from DC to Dc (switching) Regulators.

For the PCB capacitors, we are following the UG483 document(for VCCint, VCCBRAM, VCCAUX, VCCAUX_io and VCCO) and UG476 documents(for MGTAVCC, MGTAVTT and MGTAVCC_AUX).

Question1.:- In these documents few PCB capacitors are define, these no. of capacitance are enough for my requirement ?

Question2:- In these documents no high frequencies capacitors are define only some package capacitors are define. Please suggest me there are no need of high frequency Decaps. If you have any document regarding this, Please suggest me.

I am asking these questions before layout for Schematic design. Please suggest me. 

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Teacher drjohnsmith
Teacher
160 Views
Registered: ‎07-09-2009

Re: Regarding PCB Decoupling capacitors for Virtex 7

have you seen UG476, chapter 2

https://www.xilinx.com/support/documentation/user_guides/ug483_7Series_PCB.pdf

page 14 onwards shows the acceptable capacitance and values for each device

Id also suggest unless you can simulate the PDS , you play safe and as you highlight , 100 nf Capacitors on each power pin
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