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Registered: ‎06-13-2019

Setting MARK_DEBUG from XDC

Hello,

I'm having a problem using MARK_DEBUG from XDC.

Regardless of all the "MARK_DEBUG" entries in a XDC, not all RTL names are preserved after synthesis.

I have also used "set_property PROCESSING_ORDER EARLY [get_files Amc561io.xdc]" and verified that XDC read has been succesfully changed to "EARLY" under "Source File Properties".

 

Here is the partial RTL code of a module called "InstSkdFsm.vhd":

 

.....
--! Output of registers signal r : RegType; --! Combinatorial input to registers signal rin : RegType; signal stopLatched : sl; signal clrStop : sl; --------------------------------------------------------------------------------------------------- begin u_StatGlobSRFF : entity work.SRff generic map ( SET_PRIORITY_G => FALSE, TPD_G => TPD_G ) port map ( clk_i => clk_i, rst_i => rst_i, s_i => stop_i, r_i => clrStop, q_o => stopLatched, q_n_o => open );

.....
if (stopLatched = '1') then
.....
clrStop <= r.instStat.term;
.....

Here are some variants of setting "MARK_DEBUG" definitions from XDC:

Accoriding on UG901 2018.2 "set_property MARK_DEBUG true [get_nets –of [get_pins u_InstSkdFsm/stopLatched]]":

 

Variant A:

set_property MARK_DEBUG true [get_nets u_InstSkdFsm/r[state][*]] 
set_property MARK_DEBUG true [get_nets u_InstSkdFsm/stopLatched] 

Works fine

set_property MARK_DEBUG true [get_nets u_InstSkdFsm/clrStop]

[Vivado 12-507] No nets matched 'u_InstSkdFsm/clrStop'. [.../Amc561io.xdc:37]
[Common 17-55] 'set_property' expects at least one object. [.../Amc561io.xdc:37]
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.

 

Variant B:

set_property MARK_DEBUG true [get_nets –of [get_pins u_InstSkdFsm/r[state][*]]]

Works fine

set_property MARK_DEBUG true [get_nets –of [get_pins u_InstSkdFsm/stopLatched]]
set_property MARK_DEBUG true [get_nets –of [get_pins u_InstSkdFsm/clrStop]]

[Vivado 12-508] No pins matched 'u_InstSkdFsm/stopLatched'. [.../Amc561io.xdc:41]
[Common 17-165] Too many positional options when parsing '', please type 'get_nets -help' for usage info. [.../Amc561io.xdc:41]
[Vivado 12-508] No pins matched 'u_InstSkdFsm/clrStop'. [.../Amc561io.xdc:42]
[Common 17-165] Too many positional options when parsing '', please type 'get_nets -help' for usage info. [.../Amc561io.xdc:42]

 

Variant C:

RK_DEBUG true [get_nets –of [get_pins\
u_InstSkdFsm/r[state][*]]]

Works fine

set_property MARK_DEBUG true [get_nets –of [get_pins\
u_InstSkdFsm/stopLatched]]
set_property MARK_DEBUG true [get_nets –of [get_pins\
u_InstSkdFsm/clrStop]]

set_property MA [Vivado 12-508] No pins matched 'u_InstSkdFsm/stopLatched'. [.../Amc561io.xdc:47]
[Common 17-165] Too many positional options when parsing '', please type 'get_nets -help' for usage info. [.../Amc561io.xdc:47]
[Vivado 12-508] No pins matched 'u_InstSkdFsm/clrStop'. [.../Amc561io.xdc:49]
[Common 17-165] Too many positional options when parsing '', please type 'get_nets -help' for usage info. [.../Amc561io.xdc:49]

 

Vivado version that we are using is 2018.2

I am also aware that setting MARK_DEBUG from RTL exists, however I find it extremly cumbersome as RTL and implementation files should be stricltly separated. In case bellow, all names are preserved after synthesis.

attribute mark_debug : string;
attribute mark_debug of clrStop : signal is "true";
attribute mark_debug of stopLatched : signal is "true";
attribute mark_debug of r : signal is "true";

 

 

Are there any suggestions?

 

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6 Replies
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Moderator
Moderator
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Registered: ‎02-09-2017

Re: Setting MARK_DEBUG from XDC

Hi @anzejakos,

Which of those nets are not being preserver after Synthesis? And what are the names they have been renamed to? Or if you look at the synthesized schematic, did those nets just disappeared?

Initially, besides suggesting that you keep the MARK_DEBUG attribute in the RTL (since it seems that those are working), I can suggest that you can also change some Synthesis settings that may cause optimization, such as the flatten_hierarchy, keep_equivalent_registers, and no_lc.

synthesis_optimization_settings.png

 

I also must say that I am surprised that the XDC constraints are not working. I suspect there might be some issue with the syntax that is not allowing Vivado to find the nets or pins.

I can also suggest that you open the synthesized design, look a the schematic (you can CTRL+F to find a net) and also play with the TCL commands get_nets and get_pins until you get Vivado to return an object, at which point you know that is the command you need to use in the MARK_DEBUG.

Thanks,

Andre Guerrero

Product Applications Engineer

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Registered: ‎06-13-2019

Re: Setting MARK_DEBUG from XDC

Hi Andre,

I'll narrow it down to one basic case that it should work.

FLATTEN_HIERARCHY = NONE

KEEP_EQIUVIALENT_REGISTERS = disabled

NO_IC = disabled

Amc561Debug.xdc,with "PROCESSING_ORDER" set to "EARLY":

 

line 1: set_property MARK_DEBUG true [get_nets -of [get_pins u_InstSkdFsm/r[state][*]]]
line 2: set_property MARK_DEBUG true [get_nets -of [get_pins u_InstSkdFsm/stopLatched]]
line 3: set_property MARK_DEBUG true [get_nets -of [get_pins u_InstSkdFsm/clrStop]]

Source file "InstSkdFsm.vhd" remains the same.

 

After synthesis Vivado reports:

[Vivado 12-508] No pins matched 'u_InstSkdFsm/stopLatched'. [.../Amc561ioDebug.xdc:2]
[Common 17-55] 'set_property' expects at least one object. [.../Amc561ioDebug.xdc:2]
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.
[Vivado 12-508] No pins matched 'u_InstSkdFsm/clrStop'. [.../Amc561ioDebug.xdc:3]
[Common 17-55] 'set_property' expects at least one object. [.../Amc561ioDebug.xdc:3]
Resolution: If [get_<value>] was used to populate the object, check to make sure this command returns at least one valid object.

 

However, at least 'u_InstSkdFsm/stopLatched' can be found on schematic viewer, despite Vivados reports "No pins matched" reports.

vivado.png

 

Can you confirm that 'set_property MARK_DEBUG true [get_nets -of [get_pins u_InstSkdFsm/stopLatched]]' from UG901 is indeed the right xdc command to tag certain net/pin in RTL? 

I've also found out that there are different types of hyphen accross Vivado PDFs ...[get_nets of [get_pins ... ...[get_nets -of [get_pins ...

 

I've also tried playing with all three synthesis parameters you suggested: 

FLATTEN_HIERARCHY

KEEP_EQIUVIALENT_REGISTERS

NO_IC

With no real result.

 

 

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Moderator
Moderator
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Registered: ‎02-09-2017

Re: Setting MARK_DEBUG from XDC

Hi @anzejakos,

 

That's great that you found the net. I was suspecting that the net was actually there but the MARK_DEBUG command was not finding it.

The command you posted is correct in theory, but I think the issue is with the part [get_pins u_InstSkdFsm/stopLatched]

It seems that u_InstSkdFsm/stopLatched is a net and not a pin. This net is connected to the pins Q for the FDRE register and pin r_i for the Csl_SRff_33 block.

In many cases one of those pins end up having the same or similar name, but that's not guaranteed and depends of the design.

Could you try to go on the TCL console within Vivado and run the following simplified command: 

get_nets u_InstSkdFsm/stopLatched

Does that return anything? It should either return a net name or a warning saying that no nets matched that name.

You might have to play around with that command and add some * until you have it return the desired net.

Once it works, you can use it for the MARK_DEBUG command as below:

set_property MARK_DEBUG true [get_nets u_InstSkdFsm/stopLatched]

Better yet, to make things simple, on the schematic you posted where you show that the net u_InstSkdFsm/stopLatched is present, right-click on that net and select the option "MARK DEBUG" (See example below):

mark_debug_synthesized_design(2).jpg

Then look at the TCL Console. The equivalent command will be printed there. Something like:

mark_debug_synthesized_design(2)_TCL.jpg

This will help you find out exactly the command that will find that net. Then you can copy this command and use it in your XDC.

Please let me know if that helps.

Thanks,

Andre Guerrero

Product Applications Engineer

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Registered: ‎06-13-2019

Re: Setting MARK_DEBUG from XDC

Thanks for swift response. 

 

I think you are correct. 

[get_nets -of [get_pins u_InstSkdFsm/stopLatched]]

Always results in "[Vivado 12-508] No pins matched 'u_InstSkdFsm/stopLatched'."  Removing "get_pins" fixes the issue perfectly!

 

However, I have been playing with "get_nets" command since yesterday, directly from elaborated design and found out Vivado removes signal name "clrStop" from RTL durring elaboration, regardles of applayed constraint in XDC:

 

set_property MARK_DEBUG true [get_nets u_InstSkdFsm/clrStop]

Bellow is the code from my original example:

.....
--! Output of registers signal r : RegType; --! Combinatorial input to registers signal rin : RegType;
signal stopLatched : sl; signal clrStop : sl; --------------------------------------------------------------------------------------------------- begin
u_StatGlobSRFF : entity work.SRff port map ( clk_i => clk_i, rst_i => rst_i, s_i => stop_i, r_i => clrStop, q_o => stopLatched, q_n_o => open );

.....
if (stopLatched = '1') then
.....
clrStop <= r.instStat.term;
.....
instStat_o.term <= r.instStat.term;
.....

 

Vivado replaces signal name "clrStop" with its source "r.instStat.term":

viv2.png

How is that even possible? The result is the same also after synthesis. This makes me think that Vivado only sets probes on the nets which were tagged with:

set_property MARK_DEBUG true [get_nets ...]

but its somehow doesn't preserve actual RTL names as it should, am I right? 

 

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Moderator
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Registered: ‎02-09-2017

Re: Setting MARK_DEBUG from XDC

Hi @anzejakos,

Vivado does make some optimizations, so it may be that it's changing the names for that net.

The MARK_DEBUG attribute is really the best option to make sure Vivado does not touch and modify those nets.

Thanks,

Andre Guerrero

Product Applications Engineer

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Registered: ‎06-13-2019

Re: Setting MARK_DEBUG from XDC

Hello Andre,

So Vivado ignores MARK_DEBUG and optimizes the nets if you define these parameters via XDC? If thats the case, would it be possible for you to open a case so it is fixed in the next versions of Vivado?

Many thanks

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