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Scholar dwisehart
Registered: ‎06-23-2013

Setup and Hold violations seen in Integrated Logic Analyzer (ILA)

I was making some changes to a GT transceiver used at 10.3125 GHz and I set the TXUSRCLK to the wrong frequency without knowing it.  When I went to test my changes, it was obvious the port was not working but it was not clear as to what was wrong.  Even a 16 GHz scope hooked up to the output with a proper fixture did not give a clear indication.  


As a next step I set up ILA probes to look at the TX and RX data with the gearbox turned off.  I connected an external loopback connector to the transceiver and sent out { 8'hFF, 24'h0 } on each of the 32 TX input bits.  Looking at the ILA results in the RX data made my problem clear:




I was seeing setup and hold violations of either the TX parallel-in serial-out (PISO) register or the RX SIPO register.  Definitely an "Ah-ha!" moment.  Sometimes it is good to see setup and hold violations: at least when you are looking for bug, that is.  ILA was enormous help in finding this problem.





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