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Adventurer
Adventurer
580 Views
Registered: ‎11-17-2017

how to monitor signal in high-impedance state with ila?

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hi,

I want to monitor a signal which sometimes in high-impedance state .Does the ila can monitor it?What should I do?

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Xilinx Employee
Xilinx Employee
569 Views
Registered: ‎09-24-2017

Re: how to monitor signal in high-impedance state with ila?

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Hi @chenyang1994,

 

Usually high-impedance signal will be accompanied with pull-up or pull-down. For the value of a signal internal FPGA, it can only be detected as '0' or '1'. High-impedance status can't be shown by ila.

 

Thanks,

Martin

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Xilinx Employee
Xilinx Employee
570 Views
Registered: ‎09-24-2017

Re: how to monitor signal in high-impedance state with ila?

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Hi @chenyang1994,

 

Usually high-impedance signal will be accompanied with pull-up or pull-down. For the value of a signal internal FPGA, it can only be detected as '0' or '1'. High-impedance status can't be shown by ila.

 

Thanks,

Martin

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Scholar markcurry
Scholar
530 Views
Registered: ‎09-16-2009

Re: how to monitor signal in high-impedance state with ila?

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If the signal is an output signal generated by the FPGA, then monitor the tri-state enable pin.

 

Regards,

 

Mark

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