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Participant georgedu
Participant
8,157 Views
Registered: ‎04-03-2013

how to verify the FPGA loading file manually

Hi

I use the iMPACT to verify the FPGA downloading file and the tool shows it  succeed 

I notice iMPACT generate the iMPACT.rbd file .Then I compare this file with the original .rbd file (generated when bitgen )

Unfortunately ,this two file is quite different ,(I difff them in vim ), Can anybody tell me the reason ?

Thanks in advance .

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2 Replies
Participant georgedu
Participant
8,153 Views
Registered: ‎04-03-2013

Re: how to verify the FPGA loading file manually

in the generated file by bitgen command ,the rbd file is :

Xilinx ASCII Bitstream
Created by Bitstream P.28xd
Design name: tri_1.ncd;UserID=0xFFFFFFFF
Architecture: spartan6
Part: 6slx45tfgg484
Type: readback
Date: Sat Aug 31 07:13:42 2013
Bits: 11872912
0000000000000000
0000000000000000
0000000000000000

 

and in the generated file by iMPACT:

1111111111111111

^@1111111111111111

^@1111111111111111

 

I open these two in the vim 

 

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Community Manager
Community Manager
8,125 Views
Registered: ‎07-23-2012

Re: how to verify the FPGA loading file manually

refer to this answer record- http://www.xilinx.com/support/answers/53024.htm for explanation.
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