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liubo_fpga
Explorer
Explorer
14,670 Views
Registered: ‎04-28-2013

what happed to my debugging ?

I met a problem as displayed below.

I can see the procedure in my debugging: idle -> armed -> capturing -> full and I do have a trigger mark. But vivado tells me  those below and I want to know why ?

 

 

ERROR: [Labtools 27-147] vcse_server: No trigger mark in any sample in window: 0.

ERROR: [Labtools 27-147] vcse_server: Could not get Parameter: trace_data.

ERROR: [Labtools 27-1829] vcse_server failed during internal command 'CseXsdb_getParameters'. See previous error messages.

 

err2.JPG

nonsense
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11 Replies
liubo_fpga
Explorer
Explorer
14,642 Views
Registered: ‎04-28-2013

If I combine some PROBES to one and these ERROR messag will not display again.

Originally, I have 30 PROBES and total 408 signals, ERROR occured.

I combine probes to 20 PROBES and stil 408 signals, ERROR disappeared.

 

Do  too many PROBES cause the ERROR ?

 

 

nonsense
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10.21.1.34
Newbie
Newbie
14,516 Views
Registered: ‎07-19-2013

I met the same trouble when debugging ila core in vivado.  In one project, the total probes of ila are 227, and it can be debugged in the vivado. But in another project , the total probes of ila are the same . When debugging in the vivado, It reported the ERROR the same as the  upper said .I don't know why?

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debrajr
Moderator
Moderator
14,460 Views
Registered: ‎04-17-2011

Try in 2013.2. A previous known issue related to these errors has been fixed in the latest version.
Regards,
Debraj
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ksffj6eu
Visitor
Visitor
14,443 Views
Registered: ‎07-11-2013

I met the same problem too.is there any method of solution?

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debrajr
Moderator
Moderator
14,439 Views
Registered: ‎04-17-2011

As mentioned in my previous reply. A known issue related to the errors you are seeing has been fixed in 2013.2. Try using the latest tool and check.
Regards,
Debraj
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ed_xilinx
Visitor
Visitor
14,413 Views
Registered: ‎07-02-2013

Hi debrajr,

i'm currently using vivado 2013.2 and i have this error "labtools 27-1829 vcse_server" with few monitored signals (50).

Any possible explanation ?

best regards

 

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hj
Moderator
Moderator
13,893 Views
Registered: ‎06-05-2013

This is caused by Vivado version mismatch. PLease check whether you have used the same version for probing & generating the bit file. If not then try to use the same version throughout the flow. If possible please try in latest version 2014.1

Regards,
Harry
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For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
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kepingchen
Visitor
Visitor
13,594 Views
Registered: ‎03-25-2010

I am using 2014.1, get the same problem!

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achutha
Xilinx Employee
Xilinx Employee
13,591 Views
Registered: ‎07-01-2010

Hi,

 

In some scenarios the below error is seen when ILA has some timing failures.

ERROR: [Labtools 27-147] vcse_server: No trigger mark in any sample in window: 0.
ERROR: [Labtools 27-147] vcse_server: Could not get Parameter: trace_data.
ERROR: [Labtools 27-1829] vcse_server failed during internal command 'CseXsdb_getParameters'. See previous error messages.

 

Does the design meet timing ?

Can you please post the complete error log if it is different from the above error?

Is this seen in all the projects or only in the current project?

 

Regards,

Achutha

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bato990
Observer
Observer
9,326 Views
Registered: ‎10-09-2014

Hello.

 

I am working with vivado 2013.4 and in my project i have only one ILA  probe with 15 bit width and have same problem.

 

when i removing one of my asynchronous signals from probe, i dont recieve the error message again.!!!

 

I have some othe asynchoronus and synchoronus signals.

 

I think this is only a bug in Vivado!

 

Have a good time

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bp13
Visitor
Visitor
9,239 Views
Registered: ‎11-10-2014

Hi,

 

   I experienced a similar problem, but it is related to the absence of the clock that is associated with the ILA.

 

   If the clock is not present the very first time I try to trigger the ILA, I get a window pop-up with the following message:

 

   ERROR: [Labtools 27-1395] Unable to arm ILA 'hw_ila_2'.  The core clock is slow or no core clock connected for this ILA or the ILA core may not meet timing.

 

   If I trigger the ILA at least one time when the clock is present, then this pop-up window will not appear again, even if the clock goes away, as long as I keep the same number of windows in the "capture mode settings".  Vivado will indicate it triggers correctly, but it will display the old data in the display window.

 

  If I change the number of windows and the clock is still not present, I will get the following messages:

 

  run_hw_ila hw_ila_2
  INFO: [Labtools 27-1964] The ILA core 'hw_ila_2' trigger was armed at 2014-Nov-10 14:40:45
  wait_on_hw_ila hw_ila_2
  display_hw_ila_data [upload_hw_ila_data hw_ila_2]
  INFO: [Labtools 27-2214] The ILA core 'hw_ila_2' triggered in the last of '2' windows, at 2014-Nov-10 14:40:45.
  ERROR: [Labtools 27-147] vcse_server: No trigger mark in any sample in window: 1.
  ERROR: [Labtools 27-147] vcse_server: Could not get Parameter: trace_data.
  ERROR: [Labtools 27-1829] vcse_server failed during internal command 'CseXsdb_getParameters'. See previous error messages.

 

   So it looks like Vivado only indicates this error when the number of triggers in the ILA "buffer" does not match what is expected.

 

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