UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Visitor rvenka21
Visitor
158 Views
Registered: ‎07-23-2019

Application Flow in HLS

Jump to solution

Hi,

I am very new to hardware programming on SDACCEL and HLS and I have recently started learning them. In SDACCEL there is host code and a kernel. I am able to create an .exe and a .xclbin file and I am able to exeute both of them on the command line to generate the output on my stdout.

I would like to know if there is a similar capability in HLS. I understand that in HLS after the Co-Simulation step the code can be packaged as an IP and can be used in Vivado. After creating the bitstream will be I able to do something similar to SDACCEL where in an application flow my kernel will run on the FPGA and results of the computation will appear on my stdout.

With Regards,

RV

0 Kudos
1 Solution

Accepted Solutions
Scholar u4223374
Scholar
116 Views
Registered: ‎04-26-2015

Re: Application Flow in HLS

Jump to solution

If HLS could do that, nobody would buy SDAccel...

 

The short answer is "no". HLS only does the FPGA side, with virtually nothing for the CPU (it does produce a couple of drivers to allow for starting the block, but I think these are only for use on the Zynq chips). The extra functionality you're after is provided by SDSoC (for Zynq) or SDAccel (for a PCIe FPGA card in a desktop PC).

 

1 Reply
Scholar u4223374
Scholar
117 Views
Registered: ‎04-26-2015

Re: Application Flow in HLS

Jump to solution

If HLS could do that, nobody would buy SDAccel...

 

The short answer is "no". HLS only does the FPGA side, with virtually nothing for the CPU (it does produce a couple of drivers to allow for starting the block, but I think these are only for use on the Zynq chips). The extra functionality you're after is provided by SDSoC (for Zynq) or SDAccel (for a PCIe FPGA card in a desktop PC).