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Contributor
Contributor
333 Views
Registered: ‎01-23-2018

Check input signals declared as volatile

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Hello,

I am writing a simple Vivado HLS source code that implements the following module on FPGA:

when the signal "A" goes from 1 to 0, check the signal "B".
If "B" is low, then do something, otherwise do something else.

My code is:

#include <ap_int.h>

void test( // inputs volatile ap_uint<1> * A, volatile ap_uint<1> * B ) { while(*A == 1); if(*B == 0){ // do something } else { // do something else } }

 but when I try to synthesize the code I get some errors:

/storage/Programmi/Xilinx/Vivado/2018.2/common/technology/autopilot/ap_int_syn.h:6705:1160: note: candidate template ignored: failed template argument deduction
template<int _AP_W, int _AP_I, bool _AP_S, ap_q_mode _AP_Q, ap_o_mode _AP_O, int _AP_N, int _AP_W2, bool _AP_S2> inline __attribute__((always_inline)) bool operator == ( const af_range_ref<_AP_W,_AP_I, _AP_S, _AP_Q, _AP_O, _AP_N> &op, const ap_int_base<_AP_W2, _AP_S> &op2) { return (ap_int_base<_AP_W, false>(op)).operator == (op2); } template<int _AP_W, int _AP_I, bool _AP_S, ap_q_mode _AP_Q, ap_o_mode _AP_O, int _AP_N, int _AP_W2, bool _AP_S2> inline __attribute__((always_inline)) bool operator == (const ap_int_base<_AP_W2, _AP_S2> &op2, const af_range_ref<_AP_W, _AP_I, _AP_S, _AP_Q, _AP_O, _AP_N> &op) { return op2.operator == (ap_int_base<_AP_W, false>(op)); } template<int _AP_W, int _AP_I, bool _AP_S, ap_q_mode _AP_Q, ap_o_mode _AP_O, int _AP_N, int _AP_W2, bool _AP_S2> inline __attribute__((always_inline)) bool operator == ( const af_bit_ref<_AP_W, _AP_I, _AP_S, _AP_Q, _AP_O, _AP_N> &op, const ap_int_base<_AP_W2, _AP_S2> &op2) { return (ap_int_base<1, false>(op)).operator == (op2); } template<int _AP_W, int _AP_I, bool _AP_S, ap_q_mode _AP_Q, ap_o_mode _AP_O, int _AP_N, int _AP_W2, bool _AP_S2> inline __attribute__((always_inline)) bool operator == ( const ap_int_base<_AP_W2, _AP_S2> &op2, const af_bit_ref<_AP_W, _AP_I, _AP_S, _AP_Q, _AP_O, _AP_N> &op) { return op2.operator == (ap_int_base<1,false>(op)); }
^
2 errors generated.
Failed checking during preprocessing.
while executing
"source /home/gian/Documenti/HiPeRTLab/VivadoHLS-workspace/cameraInterface/cameraInterface_prj/solution1/csynth.tcl"
invoked from within
"hls::main /home/gian/Documenti/HiPeRTLab/VivadoHLS-workspace/cameraInterface/cameraInterface_prj/solution1/csynth.tcl"
("uplevel" body line 1)
invoked from within
"uplevel 1 hls::main {*}$args"
(procedure "hls_proc" line 5)
invoked from within
"hls_proc $argv"
Finished C synthesis.

 If I remove "volatile" from A and B works, but I need to use volatile, because I want to avoid optimizations.

thanks

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1 Solution

Accepted Solutions
Mentor xilinxacct
Mentor
295 Views
Registered: ‎10-23-2018

Re: Check input signals declared as volatile

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@herogian

If you change the ap_unit<1> to bool... it will compile.

You 'may' also need #pragma HLS inline off

I didn't try it with a testbench, but hopefully that will work for you.

If so, please mark as solution accepted. Kudos also welcomed. :-)

P.S. if you overload the equal operator, you can probably use the ap_uint<1> if you need to

2 Replies
Mentor xilinxacct
Mentor
296 Views
Registered: ‎10-23-2018

Re: Check input signals declared as volatile

Jump to solution

@herogian

If you change the ap_unit<1> to bool... it will compile.

You 'may' also need #pragma HLS inline off

I didn't try it with a testbench, but hopefully that will work for you.

If so, please mark as solution accepted. Kudos also welcomed. :-)

P.S. if you overload the equal operator, you can probably use the ap_uint<1> if you need to

Contributor
Contributor
257 Views
Registered: ‎01-23-2018

Re: Check input signals declared as volatile

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I solved with volatile bool instead of volatile ap_uint<1>, thanks!
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