UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Visitor yugi_nhc
Visitor
618 Views
Registered: ‎06-27-2018

How do I convert my incoming 1ULL axi-stream data to fixed-point data so I can do fixed point matrix multiplication

Hi, I am new in HLS. 

I'm implementing a HLS core to do matrix multiplication with fixed-point data. 

The AXI Stream packet size is 64bits unsigned long long, but i want to reduce hardware resource and latency, so i want to change to fixed point data ap_fixed<16,8> to do matrix multiplication in fixed point, and then the result is changed back to 64bits packet size. 

 

I found someone do it using ap_int as following. 

 

typedef ap_int<8> in_T;

typedef unsigned long long axi_T;

#define IN _WIDTH (sizeof(in_T)*8)

#define IN_WIDTH_RATIO (8*sizeof(axi_T)/ IN _WIDTH)

 

 

in_T  IN[3][3];

//Pop stream IN

for(int i=0; i<3; i++) {

                for(int j=0; j<3; j+= IN_WIDTH_RATIO) {

                                axi_T packet = pop_stream(in_stream[is_idx++]);

                                UNPACK: for (int w = 0; w < IN_WIDTH_RATIO; w++) {

                                                in_T bits = (packet>>(w* IN _WIDTH));

                                                IN[i][j+w] = *(( in_T *) &bits) & ((1ULL<< IN _WIDTH)-1);

                                }

                }

 

//Push stream IN

                for(int i=0; i<3; i++) {

                                for(int j=0; j<3; j+= IN_WIDTH_RATIO) {

                                                axi_T packet = 0;

                                                PACK: for (int w = 0; w < IN_WIDTH_RATIO; w++) {

                                                                in_T bits = *(( in_T *) &IN[i][j+w]);

                                                                packet |= (bits & ((1ULL<< IN_WIDTH)-1))<<(w* IN_WIDTH);

                                                };

                                                in_stream[is_idx++] = push_stream(packet, 0);

                                }

                }

 

How can I use ap_fixed<16,8>  instead of ap_int<8>? 
Thank you so much 

0 Kudos
1 Reply
Xilinx Employee
Xilinx Employee
519 Views
Registered: ‎05-06-2008

Re: How do I convert my incoming 1ULL axi-stream data to fixed-point data so I can do fixed point matrix multiplication

Hello @yugi_nhc,

 

I recommend reviewing the 'Range' function of the Video Processing library of HLS.  Please review page 570 of UG902 (https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_2/ug902-vivado-high-level-synthesis.pdf).  

 

It is not recommended to use the 'sizeof' function in this manor, as this will return the size of the storage location, and not the size of the class.

 

I also recommend adding the PIPELINE (II of 1) directive to the inner-loop, which contains the "pop_stream(in_stream[is_idx++]);"

 

Please let us know if you have any other questions.


Thanks,
Chris  

0 Kudos