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Observer umair0722
Observer
9,368 Views
Registered: ‎04-22-2013

How to set up vivado generated video(axi-stream) IP in SDK

Hi,

 

I am trying to use a vivado generated IP in my System design. I will explain the problem later (point 3 below) but before that some background. If further info needed fell free to as.

 

1- I generated a simple pcore IP from vivado using the example code in xapp1167 (see attachment top.cpp). It consists of two axi stream ports for image processing. I intend to use this to take an image from memory VIDEO_BASEADDR and write the processed image at another place HWPROC_VIDEO_BASEADDR.

 

2- this pcore (image_filter) was added to my XPS project. I added a VDMA (named sobel_vdma_1) core to the design and made the necessary connections. I am not sure about their correctness. Can someone verify (attachment .mhs file). Any way the bitfile was generated and exported to the SDK.

 

3- Now comes the problematic part. After exporting the new design to SDK I need to configure these two new components(image_filter and sobel_vdma_1). I am doing it as follows (in the same order)

 

XImage_filter        xfilter;
	// init filter

	xfilter.Control_bus_BaseAddress = XPAR_IMAGE_FILTER_TOP_0_S_AXI_CONTROL_BUS_BASEADDR;
	xfilter.IsReady = XIL_COMPONENT_IS_READY;

	// init the configuration for sobel filter
	XImage_filter_SetRows(&xfilter, detailedTiming[currentResolution][V_ACTIVE_TIME]);
	XImage_filter_SetCols(&xfilter, detailedTiming[currentResolution][H_ACTIVE_TIME]);

	XImage_filter_InterruptGlobalEnable(&xfilter);
//	XImage_filter_InterruptEnable(&xfilter, 3);
	XImage_filter_EnableAutoRestart(&xfilter);
	XImage_filter_Start(&xfilter);

	configureVDMA(VDMA_ID_SOBEL, DMA_DEV_TO_MEM, HWPROC_VIDEO_BASEADDR);
	configureVDMA(VDMA_ID_SOBEL, DMA_MEM_TO_DEV, VIDEO_BASEADDR);

/****************************************************************************
 * For configuration of VDMA and start transfer
 */
void configureVDMA(int vdma_id, int vdma_direction, unsigned long base_address)
{
	// vdma_id can be used to select the  VDMA base address instead of Filter_VDMA_BASEADDR

	if(vdma_direction == DMA_DEV_TO_MEM)		// from device to memory
	{// rx : S2MM

		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_RX_CTRL), 0x00000003); // enable circular mode
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_RX_START1), base_address); // start address
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_RX_START2), base_address); // start address
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_RX_START3), base_address); // start address
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_RX_FRMDLY_STRIDE),
				  (detailedTiming[currentResolution][H_ACTIVE_TIME]*4)); // h offset
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_RX_HSIZE),
				  (detailedTiming[currentResolution][H_ACTIVE_TIME]*4)); // h size
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_RX_VSIZE),
				detailedTiming[currentResolution][V_ACTIVE_TIME]); // v size
	}
	else if (vdma_direction ==DMA_MEM_TO_DEV)				// from memory to device
	{//tx : MM2S

		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_TX_CTRL),
				  0x00000003); // enable circular mode
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_TX_START1),
					base_address); // start address
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_TX_START2),
					base_address); // start address
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_TX_START3),
					base_address); // start address
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_TX_FRMDLY_STRIDE),
				  (detailedTiming[currentResolution][H_ACTIVE_TIME]*4)); // h offset
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_TX_HSIZE),
				  (detailedTiming[currentResolution][H_ACTIVE_TIME]*4)); // h size
		Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_TX_VSIZE),
				detailedTiming[currentResolution][V_ACTIVE_TIME]); // v size
	}

}

 

But the problem is what i see at the output is garbage image(uniinitialized Mem space). The display VDMA  is diplaying it from HWPROC_VIDEO_BASEADDR location where the processed image from image_filter should be place.

 

I am not sure which of these two (image filter and VDMA) are not working properly or may be both. Can you kindly point out what i am doing wrong here? or what else is needed to configure and make them function properly?

 

Anxiously waiting for your views and solutions.

Thanks

Umair

7 Replies
Observer umair0722
Observer
9,365 Views
Registered: ‎04-22-2013

Re: How to set up vivado generated video(axi-stream) IP in SDK

Sorry, messed up the attachments! The top.cpp file is not getting attached here is the code for it

 

void image_filter(AXI_STREAM& input, AXI_STREAM& output, int rows, int cols) {
    //Create AXI streaming interfaces for the core
#pragma HLS RESOURCE variable=input core=AXIS metadata="-bus_bundle INPUT_STREAM"
#pragma HLS RESOURCE variable=output core=AXIS metadata="-bus_bundle OUTPUT_STREAM"

#pragma HLS RESOURCE core=AXI_SLAVE variable=rows metadata="-bus_bundle CONTROL_BUS"
#pragma HLS RESOURCE core=AXI_SLAVE variable=cols metadata="-bus_bundle CONTROL_BUS"
#pragma HLS RESOURCE core=AXI_SLAVE variable=return metadata="-bus_bundle CONTROL_BUS"

#pragma HLS INTERFACE ap_stable port=rows
#pragma HLS INTERFACE ap_stable port=cols

    RGB_IMAGE img_0(rows, cols);
    RGB_IMAGE img_1(rows, cols);
    RGB_PIXEL pix(50, 50, 50);
#pragma HLS dataflow
    hls::AXIvideo2Mat(input, img_0);
    hls::Erode(img_0, img_1);
    hls::Mat2AXIvideo(img_1, output);
}

 

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Xilinx Employee
Xilinx Employee
9,359 Views
Registered: ‎08-02-2011

Re: How to set up vivado generated video(axi-stream) IP in SDK

I would recommend that you start by adding the VDMA first. Once that is working, then add your filter.

See the FMC Imageon demo here for some help setting up the VDMA
http://www.xilinx.com/esp/video/refdes_listing.htm
www.xilinx.com
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Observer umair0722
Observer
9,346 Views
Registered: ‎04-22-2013

Re: How to set up vivado generated video(axi-stream) IP in SDK

Hi bweic,

 

thanks for your suggestion. I tried it but could not get it to work only with the loopback VDMA as well.

As explained in the FMC tutorial you mentioned, I added a axi_vdma core. then followed the configurations for AXI vdma core at page 48 onwards. The only difference I had was stream width set to 32 (this should not have any impact). I connected the m_axis_mm2s port of vdma back to its s_axis_s2mm port. and made other connections as stated. and generated the HW design.

 

Then in SDK I have configured both the channels same as in the first post. I have also tried a change as follows for MM2S control register. 

Xil_Out32((Filter_VDMA_BASEADDR + AXI_FILTER_TX_CTRL), 0x0000000B); //


This was suggested in pg020 AXI VDMA prduct guide, triple buffer example. But I still get the same uninitilized memory on display and not the transfered image. 

 

my questions are

1- is there any problem with my hardware?

2- how should i configure my VDMA core in software SDK.

3- how many start addresses do we need to write when configuring VDMA. I am writing at first 3 locations the same memory base address. I took this from an example. is this correct?

 

thanks

umair

 

 

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Observer umair0722
Observer
9,327 Views
Registered: ‎04-22-2013

Re: How to set up vivado generated video(axi-stream) IP in SDK

Any one??
I am waiting for your suggestion and responses to my queries.

Is there a simple example of a working VDMA for testing just the loop back of stream to a different location. why can't i get the VDMA working with following guidelines as per prduct guide (PG020- page 109)

umair
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Observer umair0722
Observer
9,313 Views
Registered: ‎04-22-2013

Re: How to set up vivado generated video(axi-stream) IP in SDK

I am still clueless after a week of trying on this. I cant get the VDMA only design to work. Can someone tell the minimalistic setup(in XPS and then in SDK) to use axi_vdma core.
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Xilinx Employee
Xilinx Employee
9,310 Views
Registered: ‎08-02-2011

Re: How to set up vivado generated video(axi-stream) IP in SDK

I'd say don't bother with a loopback. The example design linked above works out of the box on zedboard and zc702. Get that to work first.
www.xilinx.com
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Observer umair0722
Observer
9,300 Views
Registered: ‎04-22-2013

Re: How to set up vivado generated video(axi-stream) IP in SDK

Unfortunately, I can not get that FMC IMAGEON design to work because i do not have an HDMI input video source. Why do i need to run the whole FMC imageon setup to get this vdma core running. Is not there a straight forward way of using VDMA core into your design.

 

I am really confused right now. It was earlier suggested "to get the VDMA working first". Can you explain why should a simple vdma loopback for moving data from location A to location B not work with default (or suggested) settings, my software configuration of the core is same as in the first post.

 

Can you for once share with me the right settings of vdma core when instantiating it in you design in XPS.

 

thanks in advance

umair

 

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