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Voyager
Voyager
8,459 Views
Registered: ‎10-07-2011

Managing AXI4-Stream data from within C code

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Hi folks,

 

Consider the function

 

void     foo(int *x, int *y);

 

where x in the input AXI4-Stream and y, the output AXI4-Stream.

 

In my application, the data (stream) provider may issue packets of any configurable length up to a maximum of 4096 data beats. The data consumer is NOT informed of what that length is and needs to rely on TLAST to know it got everything.

 

This means that the C code of the consumer block shall loop until the last valid x data is received, ie while (!xTLAST).

 

The question: How can I access the TLAST signal associated to the x variable?

 

Thanks!

 

Claude

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Moderator
Moderator
12,919 Views
Registered: ‎04-17-2011

Re: Managing AXI4-Stream data from within C code

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Refer to the example:
#include "ap_cint.h"
#define N 256
typedef struct {
uint32 data;
uint4 strb;
} DATA;
void foo_top (DATA data_i[N], DATA data_o[N]) {
// Define the RTL interfaces
#pragma HLS interface ap_ctrl_none port=return
#pragma HLS interface ap_fifo port=data_i
#pragma HLS interface ap_fifo port=data_o
// Define the pcore interfaces AXI4 slave
#pragma HLS resource core=AXI4Stream variable=data_i metadata="-bus_bundle AXI4Stream_S" port_map={{data_i_data TDATA} {data_i_strb TSTRB}}
// Define the pcore interfaces AXI4 master
#pragma HLS resource core=AXI4Stream variable=data_o metadata="-bus_bundle AXI4Stream_M" port_map={{data_o_data TDATA} {data_o_strb TSTRB}}
int i;
DATA buf[N];
for (i = 0; i < N; i++) {
buf[i] = data_i[i];
}
for (i = 0; i < N; i++) {
data_o[i] = buf[N-1-i];
}
}

Using the resource directive you can set the AXI4Stream interface to map to the required AXI4Stream Standard signals.

Refer UG902, Interface Management (AXI4Stream Interface) for details.
Regards,
Debraj
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Moderator
Moderator
12,920 Views
Registered: ‎04-17-2011

Re: Managing AXI4-Stream data from within C code

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Refer to the example:
#include "ap_cint.h"
#define N 256
typedef struct {
uint32 data;
uint4 strb;
} DATA;
void foo_top (DATA data_i[N], DATA data_o[N]) {
// Define the RTL interfaces
#pragma HLS interface ap_ctrl_none port=return
#pragma HLS interface ap_fifo port=data_i
#pragma HLS interface ap_fifo port=data_o
// Define the pcore interfaces AXI4 slave
#pragma HLS resource core=AXI4Stream variable=data_i metadata="-bus_bundle AXI4Stream_S" port_map={{data_i_data TDATA} {data_i_strb TSTRB}}
// Define the pcore interfaces AXI4 master
#pragma HLS resource core=AXI4Stream variable=data_o metadata="-bus_bundle AXI4Stream_M" port_map={{data_o_data TDATA} {data_o_strb TSTRB}}
int i;
DATA buf[N];
for (i = 0; i < N; i++) {
buf[i] = data_i[i];
}
for (i = 0; i < N; i++) {
data_o[i] = buf[N-1-i];
}
}

Using the resource directive you can set the AXI4Stream interface to map to the required AXI4Stream Standard signals.

Refer UG902, Interface Management (AXI4Stream Interface) for details.
Regards,
Debraj
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Voyager
Voyager
8,429 Views
Registered: ‎10-07-2011

Re: Managing AXI4-Stream data from within C code

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Hi Debraj,

 

Thanks for the hint. It was helpful. My code is now succeeding C-Simulation. However, it is not synthesizing. I'm getting the following messages from HLS:

 

@I [XFORM-721] Changing loop 'Loop_ProfileLoop_proc' (AveragingModule.cpp:89) to a process function for dataflow in function 'AveragingModule'.

@I [XFORM-712] Applying dataflow to function 'AveragingModule' (AveragingModule.cpp:77), detected/extracted 1 process function(s): 'AveragingModule_bb18_Loop_ProfileLoop_proc'.

@E [XFORM-123] Cannot stream 'accum.V': a local variable is streamable only if it is in a dataflow region.

 

 

My code is as below:

 

typedef     struct {

    ap_uint<16>     data;

    ap_uint<1>       last;

}   tAXIS;

 

 

void    AveragingModule(tAXIS *x,tAXIS *r,ap_uint<8> N)

{

    ap_uint<8>  i;

    ap_uint<12> j;

    ap_uint<20> index = 0;

    ap_int<24>  sum, accum[MAX_DATA_BEATS_PER_PROFILE];

 

 

    ProfileLoop: for (i=0;i<N;)

        DataLoop: for (j=0;j<MAX_DATA_BEATS_PER_PROFILE;j++) {

            if (i == 0)

                sum = x[index].data;

            else

                sum = x[index].data + accum[j];

 

            accum[j] = sum;

 

            if (i == (N - 1)) {

                r[j].data = sum / N;

                r[j].last = x[index].last;

            }

 

            if (x[index++].last == 1) {

                i++;

                break;

            }

        }

}

 

 

With the following directive set (amongst others):

 

set_directive_dataflow "AveragingModule"

 

 

Any idea of what may be going wrong?

 

Many thanks!

 

Claude

 

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Voyager
Voyager
8,428 Views
Registered: ‎10-07-2011

Re: Managing AXI4-Stream data from within C code

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Forget it... I found out I still had a HLS_PIPELINE directive on one of the loop which was conflicting with the DATAFLOW directive.

 

So the design is now synthesizing, but I get no estimation of the latency and initiation interval, as shown on the attached snapshot.

 

Also, the synthesized design is failing the cosimulation. And the issue is still related to the accum FIFO.

 

E [SIM-346] C test bench instrumentation failed: Cannot determine C object for RTL port accum_V.

@E [SIM-4] *** C/RTL co-simulation finished: FAIL ***

 

Any hint?

 

Claude

Capture.PNG
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Xilinx Employee
Xilinx Employee
8,412 Views
Registered: ‎08-17-2011

Re: Managing AXI4-Stream data from within C code

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1-
for the latencies numbers, the tool has no way to know what you wrote to us: <<In my application, the data (stream) provider may issue packets of any configurable length up to a maximum of 4096 data beats. >>
Your ProfileLoop is unbounded - N is an input.

Please try to look into the the tripcount directive and the assert() statement in UG902..

2-
for the cosim error this should be a new thread with C code and script.tcl and directive.tcl attached with any other needed files to easily reproduce this issue.
FWIW I don't think i've seen this issue before.
- Hervé

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Voyager
Voyager
8,410 Views
Registered: ‎10-07-2011

Re: Managing AXI4-Stream data from within C code

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Just to say that I resolved all that by modifying the C code.

 

Basically, the new C code just describes how to process each databeat hence, no more loops. The function just keeps track of how many vectors were processed so far, and compares that value (ie a state-machine register) to the requested number of vector to average (ie an IO port).

 

Claude

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