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Observer benzao
Observer
5,141 Views
Registered: ‎02-04-2014

c/rtl cosimulation hangs.

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c simulation is successfully.

synthesis ok,

when i use c/rtl cosimulation, it hangs.

 

 

 

Vivado Simulator 2016.1
Time resolution is 1 ps
source convolution.tcl
## run all
////////////////////////////////////////////////////////////////////////////////////
// Inter-Transaction Progress: Completed Transaction / Total Transaction
// Intra-Transaction Progress: Measured Latency / Latency Estimation * 100%
////////////////////////////////////////////////////////////////////////////////////
// RTL Simulation : 0 / 1 [0.00%] @ "125000"
// RTL Simulation : 0 / 1 [8116.36%] @ "100000145000"
// RTL Simulation : 0 / 1 [16232.71%] @ "200000155000"
// RTL Simulation : 0 / 1 [24349.07%] @ "300000165000"
// RTL Simulation : 0 / 1 [32465.43%] @ "400000175000"
// RTL Simulation : 0 / 1 [40581.78%] @ "500000185000"
// RTL Simulation : 0 / 1 [48698.14%] @ "600000195000"
// RTL Simulation : 0 / 1 [56814.50%] @ "700000205000"
// RTL Simulation : 0 / 1 [64930.85%] @ "800000215000"
// RTL Simulation : 0 / 1 [73047.21%] @ "900000225000"
// RTL Simulation : 0 / 1 [81163.57%] @ "1000000235000"
// RTL Simulation : 0 / 1 [89279.93%] @ "1100000245000"
// RTL Simulation : 0 / 1 [97396.28%] @ "1200000255000"
// RTL Simulation : 0 / 1 [105512.64%] @ "1300000265000"
// RTL Simulation : 0 / 1 [113629.00%] @ "1400000275000"
// RTL Simulation : 0 / 1 [121745.35%] @ "1500000285000"
// RTL Simulation : 0 / 1 [129861.71%] @ "1600000295000"
// RTL Simulation : 0 / 1 [137978.07%] @ "1700000305000"
// RTL Simulation : 0 / 1 [146094.42%] @ "1800000315000"
// RTL Simulation : 0 / 1 [154210.78%] @ "1900000325000"
// RTL Simulation : 0 / 1 [162327.14%] @ "2000000335000"
// RTL Simulation : 0 / 1 [170443.49%] @ "2100000345000"
// RTL Simulation : 0 / 1 [178559.85%] @ "2200000355000"
// RTL Simulation : 0 / 1 [186676.21%] @ "2300000365000"
// RTL Simulation : 0 / 1 [194792.56%] @ "2400000375000"
// RTL Simulation : 0 / 1 [202908.92%] @ "2500000385000"
// RTL Simulation : 0 / 1 [211025.28%] @ "2600000395000"

 

 

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Xilinx Employee
Xilinx Employee
9,495 Views
Registered: ‎10-24-2013

Re: c/rtl cosimulation hangs.

Jump to solution

Hi @benzao

Co-sim hangs genreally if you have incorrect FIFO depth defined in your project.

Please check on these lines and see if that helps.

We have a guide to debug the co-simulation failures @ http://www.xilinx.com/support/answers/61063.html

Thanks,Vijay
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Xilinx Employee
Xilinx Employee
5,107 Views
Registered: ‎08-01-2008

Re: c/rtl cosimulation hangs.

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check this related Post
https://forums.xilinx.com/t5/High-Level-Synthesis-HLS/C-RTL-Cosimulation-hangs/td-p/690217
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
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Xilinx Employee
Xilinx Employee
9,496 Views
Registered: ‎10-24-2013

Re: c/rtl cosimulation hangs.

Jump to solution

Hi @benzao

Co-sim hangs genreally if you have incorrect FIFO depth defined in your project.

Please check on these lines and see if that helps.

We have a guide to debug the co-simulation failures @ http://www.xilinx.com/support/answers/61063.html

Thanks,Vijay
--------------------------------------------------------------------------------------------
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Give kudos in case a post in case it guided to the solution.
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Observer benzao
Observer
5,073 Views
Registered: ‎02-04-2014

Re: c/rtl cosimulation hangs.

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hi,Vijay,

 you are right.

thank your help.

ben

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