08-10-2020 07:59 AM
I am struggling to track my Vivado project with git. I'm attempting to use the tcl script to help track changes but this seems to require an extensive manual process every time I want to check in my project.
If I understand this process correctly, in order to check my project into git, I need to use the write_project_tcl command to generate the tcl script. I then need to look at that tcl script for all the source files, copy those source files to a new location with the same folder structure and make sure all those files are added in git. Then when recreating the Vivado after pulling from git, I have to specify the new origin directory and run the tcl script.
I tried leaving the source files in the same location and simply adding them to the git repository, but then when running the tcl command to regenerate the Vivado project I get an error saying the project already exists. If I try to force the overwrite, it deletes my source files and then can't find them.
Is this the Xilinx recommended process? I cannot find a straight answer online. If someone could point me in the right direction I would be most appreciative.
08-16-2020 08:59 AM
Let me investigate this query internally and will update you shortly with the outcomes.
08-17-2020 05:16 AM
I do now have a system in place to check in and track my project but it is far from fool-proof. I wrote a couple bash and tcl scripts to "pack" the project for git and then "unpack" the project after it's been checked out. I had a lot of trouble making sure everything was in the right place. There is still a very manual process of ensuring that each file is correctly copied over and added to git.
One tip: the origin_dir must be at the same level as the folder the vivado project folder.
This structure worked for me:
[myun@localhost myproject]$ tree
│ └── all_ip_goes_here
│ ├── my_rfsoc_vivado
│ │ ├── my_rfsoc_vivado.xpr
│ │ └── other_vivado_project_folders
│ └── my_rfsoc_vivado.tcl
08-18-2020 09:29 AM
My team has a separate repository for standard components, and read those in using a custom tcl script which reads the paths from an input file. Project specific sources are kept in a unique repository where vivado generated files are kept in an ignored directory. IP, constraints, and other sources are in side by side folders, also read in by custom tcl scripts. There's some upfront work, but then there's no hand-moving of anything to check in or recreate a project.
08-18-2020 09:40 AM
My main question to Xilnx is: why does it have to be so difficult?!
Good to know that it's possible, this is my first time with the Vivado block design setup as my projects before this have been vhdl/verilog only.
As long as the top-level wrapper doesn't change, I think I won't have to manually copy things over to check into git, but if I want Vivado to manage that for me, I don't know how to get around that.
One queston for you: if you are adding new files to the project, do you have to go and manually change the scripts or are the scripts smart enough to figure that out? Sounds like you would have to update your input file?
08-18-2020 09:45 AM - edited 08-18-2020 09:46 AM
With regards to the block design, we export that as a tcl script and source it as well. Our setup doesn't lend itself well to write_project_tcl.
The input file would need updated as the sources change, but that can also be automated with a tcl script to read the file sets and export them to a text file.
08-19-2020 10:22 AM