08-07-2013 11:22 AM
I'm replicating a ISE tutorial design to Vivado. In that tutorial, some of the IP input signals are tied to "net_vcc" or "net_gnd" It's not clear how I would accomplish this in the Vivado Block Design IP integrator.
08-07-2013 01:27 PM
08-07-2013 11:43 AM - edited 08-07-2013 11:43 AM
1) There are default tieoffs on ports (use the filters to enable them so you can see their values). Be careful with default tieoffs if you are building a hierarchical design.
2) Use a 'Constant' block
08-07-2013 12:51 PM
How do I "use the filters"? Is this something I set in Vivado? I can't find any features in Vivado with the term "filter" in it.
08-07-2013 01:22 PM
Okay, I already had that open and all the boxes are checked. However, it's still not clear how to assign the default. I right click in the block design panel and Create Port...
In the popup, I give it a name, set the direction to input, and type to "other", but there is no default field, so I'm still missing something.
08-07-2013 01:27 PM
08-07-2013 01:39 PM
12-16-2013 11:58 AM
How can I split the data_in_to_device[10:0] vector to individual signals
data_in_to_device(0) ---> to input
data_in_to_device(1) ---> to input
data_in_to_device(2) ---> to input
or is there an IP which performs the opposite of concat IP
03-23-2014 07:53 AM
Constant block is EXTREMLEY obfuscating - there is no way to name it like GND or VCC.
How I can mark it someway to see, which value is set on it?
04-13-2014 11:35 AM
Thank you, it is realy helped.
But would be great to use some simpler way to connect pins to GND/VCC like another menu option near "Disconnect Pin"
06-19-2014 06:13 AM
Have you solved the problem you mentioned?
Iif yes how?
Actually I want to split my 64 bit signal to two 32 bit signals but could not find any slice block to do that. A 64 bit input is coming from outside world.
Thanks in advance.
06-19-2014 10:21 PM
You can try as shown in the snapshot below