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270 Views
Registered: ‎12-06-2018

RTL schematic black box

Hi

I am working in vivado, and when running the RTL schematic I ran into a problem.

One of my vhd modules are apparently a black box type. I have no idea how that happened, and I can't click on the the module in my schematic to see what's inside.

How do I fix that?

Regards Michelle

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2 Replies
Xilinx Employee
Xilinx Employee
255 Views
Registered: ‎05-22-2018

Re: RTL schematic black box

Hi s154007@student.dtu.dk 

The reason for module coming as Black Box can be that the Vivado is unable to make a connection between the instantiation and the module.  The first thing I would suggest is to check your syntax and verify that the instantiation exactly matches the module definition. 

Also if you are building the design with "Out of Context" mode ("OCC"), then change that to use "Global".

Thanks,

Raj

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Scholar dpaul24
Scholar
248 Views
Registered: ‎08-07-2014

Re: RTL schematic black box

s154007@student.dtu.dk,

In addition to the above, check if you have added the VHDL module to your Xilinx project.

 

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