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Contributor
Contributor
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Registered: ‎05-10-2019

TCL command for exporting address for IP blocks in PL

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Hi,

Is there a way to export using TCL , the addresses shown in Address Generator  for IP blocks in Programmable logic in Vivado.

I am using Zynq MPSoC and for IPs in PL, I am interested to get their base addresses for my verification env.

It will be helpful if I can generate them using a script 

BR

Bhanu

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Xilinx Employee
Xilinx Employee
184 Views
Registered: ‎06-27-2018

Re: TCL command for exporting address for IP blocks in PL

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Hi @bhanu27 ,

Address map from an existing design can be exported to .csv file using following tcl command:-

assign_bd_address -export_to_file <path_to_the_csv_file where memory map is to be written>

Please refer to UG994-page 94- Importing and exporting address map from address editor

~Chinmay

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Xilinx Employee
Xilinx Employee
185 Views
Registered: ‎06-27-2018

Re: TCL command for exporting address for IP blocks in PL

Jump to solution

Hi @bhanu27 ,

Address map from an existing design can be exported to .csv file using following tcl command:-

assign_bd_address -export_to_file <path_to_the_csv_file where memory map is to be written>

Please refer to UG994-page 94- Importing and exporting address map from address editor

~Chinmay

View solution in original post

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