cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Xilinx Employee
Xilinx Employee
24,464 Views
Registered: ‎04-12-2010

Vivado Tcl Training + Video-based Training

Play Video Vivado "How To" Video-based Tutorials
Xilinx is developing QuickTake Video Tutorials in order to assist our users in making the transition from the ISE software tools to the Vivado™ Design Suite. The tutorials are designed to be short clips targeting very specific topics. We’ll continue to add additional videos as well as keep the existing ones current as new software releases roll out.
Essential Tcl Scripting for the Vivado Design Suite - Updated Aug 2013

Learn how to use basic Tcl syntax and language structures to build scripts suitable for use with Xilinx FPGA design tools. Learn about the effective use of variables, data types, and Tcl constructs to build effective conditional statements and loop controls. You will also have the opportunity to use Tcl language constructs with several labs designed to provide you scripting experience within the Vivado® Design Suite.

 

Vivado Design Suite Static Timing Analysis and Xilinx Design Constraints - Updated Dec 2013

This course offers detailed training on the Vivado® software tool flow, Xilinx design constraints (XDC), and static timing analysis (STA). Learn to use good FPGA design practices and all FPGA resources to advantage. Learn to fully and appropriately constrain your design by using industry-standard XDC constraints. Learn how the the Vivado IDE design database is structured and learn to traverse the design. Create appropriate timing reports to perform full STA and how to appropriately synthesize your design.

 

If you have any recommendations or requests for additional Vivado Video Tutorials please send me a private message and we'll ensure to record and post your recommended videos.

0 Kudos
8 Replies
Highlighted
Moderator
Moderator
24,357 Views
Registered: ‎10-04-2011

Re: Vivado "How To" Video-based Tutorials

I would add to the original post that while there is a specific TCL and SDC training soon to be available:

 

"Basic overview of Tcl and XDC capabilities"

 

That the individual tool or procedure trainings will also use TCL constructs to access the design and perform common tasks.

 

 

0 Kudos
Highlighted
Visitor
Visitor
24,344 Views
Registered: ‎05-31-2011

Re: Vivado "How To" Video-based Tutorials

I've been viewing the videos and have notice that when I pause them, then try to resume, they often hang.

I then have to go back to the web page and relaunch the video. Is there some way to avoid this ?

 

BTW, the reason I paused was to look up a file extension in Appendix A of the Command Line Tools User Guide

(http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/devref.pdf ).

Unfortunately, the appendix doesn't include many of the extensions (e.g. .xco, .xci, .xdc, etc.).

When will this appendix be updated ?

 

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
23,898 Views
Registered: ‎03-24-2008

Re: Vivado "How To" Video-based Tutorials

The command line tool reference guide is specific to ISE.  Since ISE will never support the new vivado tools, you will not see this document updated to refer to Vivado.  There is an entirely new series of user guides and documentation on Vivado, which is where xdc, xci, etc will be documented.

 

http://www.xilinx.com/support/documentation/dt_vivado2012-4_userguides.htm

Greg Daughtry
Vivado Product Marketing Director, Xilinx, Inc.
0 Kudos
Highlighted
Newbie
Newbie
23,226 Views
Registered: ‎08-02-2013

Re: Vivado Tcl Training + Video-based Training

Which documents has detailed information about STA in FPGA ?

I only have Primetime usage experience.

I want to know how to do FPGA STA in my new design.

 

Thanks

 

    Roger

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
21,257 Views
Registered: ‎04-16-2012

Re: Vivado Tcl Training + Video-based Training

Hi Roger,

 

This user guide may help you: http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_1/ug906-vivado-design-analysis.pdf

 

Thanks,

Vinay

--------------------------------------------------------------------------------------------
Have you tried typing your question in Google? If not you should before posting. Also, MARK this is as an answer in case it helped resolve your query/issue.Give kudos to the post that helped you to find the solution.
0 Kudos
Highlighted
Moderator
Moderator
21,255 Views
Registered: ‎06-05-2013

Re: Vivado Tcl Training + Video-based Training

Please check the below user guide as well.

http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_4/ug938-vivado-design-analysis-closure-tutorial.pdf

For training material please check the following http://www.xilinx.com/training/

Regards,
Harry
-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos
Highlighted
17,874 Views
Registered: ‎02-24-2015

Re: Vivado Tcl Training + Video-based Training

Can anybody tel me how to add zed board in the system generator board description builde for hardware co simulation.]

thanks

0 Kudos
Highlighted
Moderator
Moderator
17,863 Views
Registered: ‎01-16-2013

Re: Vivado Tcl Training + Video-based Training

Hi,

 

Please start a new thread in correct group to get quality and quick answers to your post.

Check the following discussion: http://forums.xilinx.com/t5/Zynq-All-Programmable-SoC/System-Generator-Board-Description-Builder-SBDBuilder-for-Zynq/td-p/395041

 

--Syed

---------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

Did you check our new quick reference timing closure guide (UG1292)?
---------------------------------------------------------------------------------------------
0 Kudos