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Visitor
Visitor
31,243 Views
Registered: ‎03-20-2008

Vivado XDC and TCL

I would like to use some facilities of the TCL language in my specification of constraints via the XDC format.  It seems Xilinx currently does not support the use of the TCL "if" statement directly in the XDC file.  Has anyone else encountered this issue?  Or other restrictions of the use of pure TCL in XDC files?  Xilinx, is there any plan on supporting more of the TCL language in XDC files? 

 

CRITICAL WARNING: [Designutils 20-1307] Command 'if' is not supported in the xdc constraint file. [<file and line #>]

 

 

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Observer
Observer
5,651 Views
Registered: ‎03-12-2009

Hi avrumw

 

I'm starting to port some designs to Xilinx/Vivado after some years on Altera/Quartus and I'm having problems porting a constraint file.

 

Basically in Altera I have 1 sdc that exclusively applies a big bunch of multicycles.

 

It's coded something like:

 

 

set src_list {
  source node 1
  source node 2
  ..
  source node n
}

set dst_list {
  destination node 1
  destination node 2
  ..
  destination node m
}

foreach dst $dst_list {
  foreach src $src_list {
    set_multicycle_path -from $src -to $dst -setup -end 3
    set_multicycle_path -from $src -to $dst -hold -end 2
  }
}

 

 

This file is just added as the last constraint file to the Altera project and is a plain process.

 

Now on Vivado I get an error that the foreach is not a valid command (after read this topic I know why - is TCL command and it's not supported on XDC files).

 

How can I do this on Xilinx/Vivado?

 

Thanks for the help

 

 

 

 

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Scholar
Scholar
5,644 Views
Registered: ‎06-23-2013

You are going to need to enumerate them in your XDC file.

 

set_multicycle_path -from $src_1 -to $dst_1 -setup -end 3
set_multicycle_path -from $src_1 -to $dst_1 -hold -end 2
set_multicycle_path -from $src_2 -to $dst_1 -setup -end 3 set_multicycle_path -from $src_2 -to $dst_1 -hold -end 2
etc.

 XDC does allow wildcards, so if you can name the sources or the destinations similarly but unique within your design like SRC_01 to SRC_15 and DST_55 to DST_75, you can set from using path/SRC_* or path/SRC_?? and to using path/DST_* or path/DST_??

 

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Observer
Observer
5,636 Views
Registered: ‎03-12-2009

@dwisehart

 

Thanks.

 

So I will need to invest some time making a xdc file enumerating it all.

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Scholar
Scholar
5,634 Views
Registered: ‎09-16-2009

 

Consider "Scoped XDC" files as well.  Search on these forums for more details.

It may or may not work with your designs, but is worth mentioning.

 

Regards,

 

Mark

 

 

 

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Observer
Observer
5,614 Views
Registered: ‎11-27-2012

You can use .tcl files as constraint files to allow the usage of foreach.

I think it is called unmanaged constraint file in the Vivado IDE (see UG903).

 

 

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Guide
Guide
5,585 Views
Registered: ‎01-23-2009

foreach dst $dst_list {
  foreach src $src_list {
    set_multicycle_path -from $src -to $dst -setup -end 3
    set_multicycle_path -from $src -to $dst -hold -end 2
  }
} 

 

 

Why (oh why????) would you do this?

 

Instead of the two nested for loops just do

 

set_multicycle_path -from $src_list -to $dst_list -setup -end 3
set_multicycle_path -from $src_list -to $dst_list -hold -end 2

 

The set_muticycle_path command can take a list of startpoints and a list of endpoints - there is absolutely no reason to do them path by path.

 

The main advantage of this is that it requires no non-xdc commands - you don't need the foreach loops so it works in XDC.

 

There are many other advantages...

 

The execution of each constraint command takes time. Since Tcl is parsed this is not negligible. Depending on the size of your lists (lets say there are 50 items in each list), this is the invocation of 5000 commands instead of 2. This could be the difference between (and I am making up numbers here) 1/10th of a second and 250 seconds (more than 4 minutes) - just to execute this loop - and it goes up quadratically with the number of elements in the list.

 

Furthermore, it is unlikely that all NxM paths actually exist. For any element in src_list that doesn't propagate to an element in dst_list, you will get a warning message. If only 50% of these paths exist (which essentially means that all 50 endpoints have a fan-in chain of 25 different flip-flops - which is pretty big), then you will get 2500 warning messages (one for the setup and one for the hold of each of the 1250 paths that don't exist). Again, this grows quadratically with the number of endpoints...

 

So just don't do it with the foreach loops...

 

Avrum

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Observer
Observer
5,582 Views
Registered: ‎03-12-2009

Hi @avrumw

 

It was done in that way because we didn't know how to do that in other way.

 

The matrix is something like 10x40 and yes, all paths exist.

 

Thanks for the help.

 

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Observer
Observer
4,863 Views
Registered: ‎08-22-2014

Hi,

 

I have a similar problem and would like to stop using a for loop since xdc doesn't support it but don't see how. In my case, I need to set_max_delay for paths that are known to exist between clock domains but are truly async and allowed. The number of clocks may vary and I don't know the true clock name/source at the level I am working at. I need to write this constraint scoped for "my_module." Below is what I'd like to do if TCL were fully supported in xdc. Any suggestions on better ways to achieve this?

 

Best Regards,

 

Steve

 

set mymodule_clocks [get_clocks -quiet -of_objects [get_cells -quiet -hierarchical -filter "NAME=~ *mymodule_module*"]]

 

foreach mymodule_clk1 $mymodule_clocks {

               set mymodule_clk1_reg [filter [all_registers -quiet -clock $mymodule_clk1] {NAME=~ *mymodule_module_* }]

               foreach mymodule_clk2 $mymodule_clocks {

                              if {$mymodule_clk1 != $mymodule_clk2} {

                                             set mymodule_clk2_reg [filter [all_registers -quiet -clock $mymodule_clk2] {NAME=~ *mymodule_module_* }]

                                             set_max_delay -quiet -from $mymodule_clk1_reg -to $mymodule_clk2_reg -datapath_only [get_property -min PERIOD $mymodule_clk2]

                              }

               }

}

 

 

 

 

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