AXI Stream FIFO

[omega8888]

I am using the AXI stream FIFO to stream data into the Rx side and eventually will be read back from the processor through AXI bus as well. There are some configuration with the AXI stream FIFO need to be configure. How can I read back the FIFO content?

Do I read base_address + 0x1C and FIFO data will be read out at base_address + 0x20?

Is the FIFO data will be update to the base_address + 0x20 on every read till it is empty?

[muzaffer]

Yes you read 0x1c to figure out how many received data there are and then read 0x20 to get the actual data which changes every time you read it.

[u24c02]

Can you upload the project file for solving?

[omega8888]

Thanks for the reply.

Is that true every read at 0x20, the count in 0x1C will decrease by one.

[muzaffer]

>> Is that true every read at 0x20, the count in 0x1C will decrease by one.

Yes, that's right.

[omega8888]

Thanks for the help

[muzaffer]

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