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Visitor urianr
Visitor
3,042 Views
Registered: ‎01-22-2017

Axi Quad SPI slave 8 bit problem

The AXi Quad SPI for Zynq show the following erroneous behaviour in 8 bit slave mode:

After the master enables clock, the slave sends the first byte twice.

I could see this also on the Oscilloscope. 

 

In 32 bit slave mode, the bytes are sent correctly.

 

Is that a known issue of the AXI Quad SPI ?

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5 Replies
Visitor urianr
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3,005 Views
Registered: ‎01-22-2017

Re: Axi Quad SPI slave 8 bit problem

correction: in 32 bit mode also the first word will be sent twice.
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Visitor urianr
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2,941 Views
Registered: ‎01-22-2017

Re: Axi Quad SPI slave 8 bit problem

 

After a few experiments, I found out the following if you want to send two more bytes:

Before enabling the SPI system (via bit 1 of SPICR) , the Fifo must have already 2 entries.

 

Here is the sequence how the slave sends the correct bytes, when the master activates SS and Clock  

 

  1. Set SPICR to 0x60 to clear Fifos and disable SPI system
  2. Put two entries in the  Fifo.
  3. Set SPICR to 2 to enable SPI system
  4. Put the remaining bytes in the fifo 

Is this only a workaround or expected behaviour?

 

 

 

Visitor oscargomezf
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2,813 Views
Registered: ‎10-17-2016

Re: Axi Quad SPI slave 8 bit problem

Hi urianr,

 

We have a problem similar to you. We are using SPI in slave mode (FIFO with 256 words of 32 bits), but we are using CDMAs. But the result is the same, sometimes the slave send the first word of 32 bits twice. And this only happens under certain clock configuration.

 

We checked the step you wrote in order to solve the problem but it did't work for us.

 

Do you know if this issue is a bug in the AXI Quad SPI v3.2? I've found that that this IP of Xilinx has other errors like this: https://www.xilinx.com/support/answers/68511.html but the error is only in master mode.

 

Do you know how to report this weird issue to xilinx?

 

Best regards.

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Visitor urianr
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2,773 Views
Registered: ‎01-22-2017

Re: Axi Quad SPI slave 8 bit problem

@oscargomezf could you please post the clock configurations. Then I can try to check that on my design. 

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Visitor oscargomezf
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2,603 Views
Registered: ‎10-17-2016

Re: Axi Quad SPI slave 8 bit problem

Thank you very much in advance for your help.

 

I am sorry for answering so late, but right know a workmate is working in order to solve this issue, I told him that I've opened this ticket so if need some help he'll make contact with you trough this forum.

 

Thank you very much again.

 

Best regards.

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