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Visitor
Posts: 14
Registered: ‎06-06-2016
Accepted Solution

[Constraints 18-4383] Could not create 'LOC' constraint because the specified site '' could not be found in current part 'xc7a200tfbg484-2'

Hello,

I trying to interface 80MHz ADC with Artix-7 FPGA (XC7A200T). 

 

I used "IDELAYCTRL" in my design for IDELAY2. Pls. see the snapshot of the "Implementation", "warning message", and source code. 

 

In implementation, it looks "IDELAYCTRL" routed properly, but why it shows, warning! 

 

I am having timing problem on capturing ADC output!

 

I am glad for your valuable reply. 

Idelayctrl_warning.png

Accepted Solutions
Teacher
Posts: 4,871
Registered: ‎03-31-2012

Re: [Constraints 18-4383] Could not create 'LOC' constraint because the specified site '' could not be found in current part 'xc7a200tfbg484-2'

@syed_radiation I don't think you need to place IDELAYCTRL cells. In any case if the yellow highlighted line is where you set the LOC property, label doesn't really seem like a valid site for a xilinx fpga. You can see what the site is by looking at the properties of the placed cell.

- Please mark the Answer as "Accept as solution" if information provided is helpful.
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Teacher
Posts: 4,871
Registered: ‎03-31-2012

Re: [Constraints 18-4383] Could not create 'LOC' constraint because the specified site '' could not be found in current part 'xc7a200tfbg484-2'

@syed_radiation I don't think you need to place IDELAYCTRL cells. In any case if the yellow highlighted line is where you set the LOC property, label doesn't really seem like a valid site for a xilinx fpga. You can see what the site is by looking at the properties of the placed cell.

- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
Visitor
Posts: 14
Registered: ‎06-06-2016

Re: [Constraints 18-4383] Could not create 'LOC' constraint because the specified site '' could not be found in current part 'xc7a200tfbg484-2'

Hello,

 

I defined variable as below: 

generic (
C_OnChipLvdsTerm : integer := 1;
C_AdcUseIdlyCtrl : integer := 1;
C_AdcIdlyCtrlLoc : string ;
C_BufioLoc : string ;
C_BufrLoc : string ;

C_AdcChnls : integer := 16; -- Number of ADC in a package
C_AdcBits : integer := 14
);

 

I didn't assign specific location in fabric. Anyway, when I comment it out below line 

-- attribute LOC of AdcToplevel_I_IdlyCtrl_0 : label is C_AdcIdlyCtrlLoc;

Still I have same warning message. 

 

Thanks for your kind reply.