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Contributor
Contributor
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Registered: ‎11-14-2011

DDS Compiler 4.0

Dear sir,

 

I am implementing Frequency Hopping Spread sprectrum, so i need differnet carrier in different frequency,my on board frequency is 80mhz. so my question is how can i genearate with particular carrier frequency using DDS compiler block in system generator.

 

Eg. 10mhz carrier using 80mhz clock signal, but i need clear and efficient sine wave. how can i do, its possible.

 

pleaes help me sir.

Shark
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Contributor
Contributor
1,950 Views
Registered: ‎05-13-2013

Re: DDS Compiler 4.0

Hi,

 

You can do it perfectly with the DDS block.

 

Just configure it as “Phase_Generator_and_SIN_COS_LUT”, enter 80 (as your clock is 80 MHz) in the “System Clock (MHz)” box and enter 10 (if you want a 10 MHz output) in the “Channel 1” box of the “Output frequency” tab. Also enable either “Sine”, “Cosine” or both in the “Output selection” section of the “Basic” tab, depending on your necessities.

 

This is for a fixed 10 MHz frequency. In case you want it to be runtime reconfigurable, in the “Output frequency” tab  select “Programmable”. This way, an additional input port (config_tdata_pinc) will appear in the block which will control the output frequency. This is the basic configuration, please check block’s help for further information.

 

This is for the DDS Compile 5.0. Anyway, other versions are quite similar.

 

With regards to your concern about the clearness of the signal, please take into account the ratio between your input clock and the desired frequency. With a 80MHz/10MHz ratio you’ll “only” have 8 points per sine period so your signal will have noticeable steps in simulation. Anyway the signal will be perfectly functional for a modulation.

 

Good luck,

 

IKERLAN FPGA
fpga@ikerlan.es
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