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Adventurer
Adventurer
5,066 Views
Registered: ‎03-31-2014

Doubt on AXI memory mapped to PCIe

Hi,

 

Please clarify on following doubts regarding AXI memory mapped to PCIe.

 

1. What are the configuration done through S_AXI_CTL interface?

2. Can more than one master access PCIe endpoint by connecting more than one AXI masters through axi_interconnect block to S_AXI port of AXI PCIe?

 

Thanks

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Teacher
Teacher
5,032 Views
Registered: ‎03-31-2012

1. Normally you don't have to talk to this interface if you configure your IP properly. For details check out the documentation on what's possible but most probably you won't need to touch them.
2. Yes, you can attach an interconnect which has multiple slave ports, one master port to do this.
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Adventurer
Adventurer
5,018 Views
Registered: ‎03-31-2014

Thanks for the clarification

 

for SAXI_CTL , I understand BAR address translation is done by AXI PCIE ip and not done outside. Isn't it?

 

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