02-25-2016 02:57 PM
I am trying to implement a digital circuit of my research project in Virtex-5 FPGA board. The board model is "XC5VLX110T". I am using ISE Design Suit 12.3. I have webpack license and also I have downloaded Vivado Design Suit 30 days evaluation license. The verilog code can be synthesized successfully. But it gives me error at Map stage of Implementation Design. The error message is "No 'ISE' feature was available for part 'xc5vlx110t'". I need to go all other steps to measure delay and use Xpower Analyzer. Can anyone please help me to figure out the problem and give me a solution for that? I am really stuck in this step.
02-25-2016 07:26 PM - edited 02-25-2016 07:28 PM
You generated the Vivado Design suite 30-day evaluation But you need ISE license to run the implementation in ISE Design Suite on Virtex-5 device (xc5vlx110t).
02-25-2016 07:31 PM
Thanks for your reply. I used ISE Design Suit webpack license first. Got the same error. Then I downloaded Vivado Design Suit 30 days evaluation license. But I am getting the same error. I don't know what to do now.
02-25-2016 07:43 PM
You need ISE license to overcome this license.
ISE WebPACK doesnt include your virtex-5 device. See below snapshpot:
02-28-2016 09:01 AM