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Registered: ‎10-16-2016

FFT synchronization with FIFO memory

Hello everyone 

My greetings

Can anyone please help me to understand how can i use the FIFO memory to synchronize my FFT core design, i'm designing an FFT core and i'm finding a problems in controlling it, so i want to try to control it and synchronize the data streaming into this core by using FIFO block.

Should the FIFO be in AXI stream or Native interface is fine? And how can i connect it with my FFT AXI input ports so the data will be streamed correctly to the core and get a good results, and is it possible to use a common clock or independent clk for reading and writing sides? 

Please if someone know this issue and how to solve i would appreciate the help too much. 


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