12-29-2014 09:50 PM
Good morning all
Am new to board layout of FPGA. I have no idea about it. I want to learn board layout for configuration clock.
Can any one please tell me about it or send me the any document i need to refer for this?
Thank you in advance
12-30-2014 07:15 AM
Look at the schematics on xilinx.com for the boards we offer.
Also consult the cnfiguration user's guide for the device you wish to you,
12-31-2014 09:42 PM
Based on your previous posts I am guessing that you are using Spartan-3AN. In that case refer the schematic & gerber files in the below SP-3AN board link
The main basic requirement for configuration clock layout routing are below
1) Impedance matching & control impedance routing
2) Lesser length as much as possible
3) Lesser number of PTH'S
If possible you can run IBIS simulations to check Signal Integrity (SI) problems. Also the below check list is useful to minimize mistakes