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live4perfection
Adventurer
Adventurer
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Registered: ‎04-24-2015

How to send fixed point number

am using Vivado for Zedboard. I have my custom IP contains 8 bit input .I need to do some arithmetic operation with fixed point number too. But this fixed point number shall be sent from SDK to FPGA part. So my question is how to represent float_value = 0.2 as fixed point in SDK ? So that fixed point number shall be sent to my FPGA.

PS: I don't need to use Floating Point IP in design, as it will take float value and then sent to FPGA by converting fixed point . I need fixed point value to send to FPGA:

Can anyone please tell that what can be the conversion factor for 8 bits ? If I set 8 bit representation for fixed point numbers then what would be the formula then to convert float to fixed point ? I want to do conversion in C code.

I have read that : If your fixed point numbers have 23 bits of fraction, f = n * (1.0 / 0x800000)

Let me take an example: Float number = 0.2 . Then what can be the fixed point value for 0.2 in 8 bits ?

PS: I want to give fixed input from C code which will go to my FPGA . FPGA take that fixed point value as 8 bits . So this is my question I am actually asking !! I am using unsigned (7 downto 0 ) input in FPGA . so that port is expecting unsigned input 8 bits.

     data : input unsigned (7 downto 0) ; 

Kindly clarify my confusion , that would be appreciated . thanks –

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muzaffer
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Registered: ‎03-31-2012

First you need to figure out how fixed point numbers are interpreted. In other words in the 8 bits you have where is your fixed "point" or how many fractional bits you have or what is the dynamic range of your 8 bit numbers. These mean exactly the same thing. Suppose your 8 bit numbers are 2.6 ie 2 bits of whole numbers and 6 bits of fractions. So the dynamic range is [0, 4) (unsigned). If this were your representation, the closest mapping of 0.2 would be 00.001101 or 0.203125.
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live4perfection
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Registered: ‎04-24-2015

As i have wriiten above that my Ip is receiving 8 bits unsigned numbers. So in SDK, i have wriiten    

*((u32*) constant) = 0b0001000; i am assuming  last 4 are fractional. so this value is supposed to be 0.5.

Now my FPGA has code :

 

 signal out : unsigned (39 downto 0) ;
signal in : unsigned (32 downto 0);
signal constant : unsigned (7 downto 0):
out <= constant * in;

 

So the vhdl code will treat constant as the value = 8. but actually i am supposed to send 0.5.

 i hope you get my point. So how to multiply actually 0.5 as fixed point using such circumstances.

 

Thanks

 

Regards

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muzaffer
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Registered: ‎03-31-2012

Suppose "in" is 0b00101000 (ie 2.5) so 'out' is :

2.5 * 0.5 = 1.25
0b00101000 * 0b00001000 = 0b0000000101000000 with format of 8.8 (4.4 x 4.4 => 8.8)
you need to convert (round/truncate) this to 4.4 again so take the middle 8 bits which gives 0b00010100 = 0b1.01 = 1.25 qed
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live4perfection
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Registered: ‎04-24-2015

i guess. you took it wrong.

in is my unsigned (31 downto 0) and i am sending value from SDK :

TX = 0x01010101 ; which will go to in.

and constant is unsigned ( 7downto 0) which is constant = 0b00000001:

so multiply basicaly those two values .

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live4perfection
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Registered: ‎04-24-2015

whereas i should assume constant as fixed point number, and in as normal hex value .

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muzaffer
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Registered: ‎03-31-2012

What you need is to know the representation of both numbers. Say your 32 bit number is in x.y format where x+y == 32 and your constant is in 4.4. If you multiply them you get a 40 bit number in the format (x+4).(y+4) which is your out value. So straight multiplication is all you need. If you need to assign it back to 32 bits, you need to figure out how/where to round/truncate.
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live4perfection
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Registered: ‎04-24-2015

@muzaffer yes i understood your point completely but do i need to manually truncate for every input ? Ok I choose the 8 bits according to my required answer 2.5 for (00101000) . so again manually round off this ?

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