UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Reply
Highlighted
Observer
Posts: 18
Registered: ‎06-06-2016
Accepted Solution

IDDR simulation failed

Hello,

 

I am trying to IDDR primitive to capture data in both clock edges. Unfortunately, I doesn't work. Pls. find RTL and simulation result attached herewith.

 

Is there anything I am missing?

 

Thanks for your reply.  

IDDR_sim_prob.png

Accepted Solutions
Observer
Posts: 18
Registered: ‎06-06-2016

Re: IDDR simulation failed

Hello,

 

I made a mistake to configure "S". it should be '0' instead of '1'. 

 

The problem is solved. 

 

Thanks.

View solution in original post


All Replies
Observer
Posts: 18
Registered: ‎06-06-2016

Re: IDDR simulation failed

Hello,

 

I made a mistake to configure "S". it should be '0' instead of '1'. 

 

The problem is solved. 

 

Thanks.