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Visitor drinu8
Visitor
4,006 Views
Registered: ‎10-21-2015

LVDS25 outputs using a Vcco of 3.3V

Hi All,

 

The device I am using is the Artix 7 - XC7A200T-2FFG1156C.

I would like to connect a DAC to the FPGA, that requires LVDS signalling. Would it be possible to use LVDS25 to output the required data by the DAC, using a Vcco voltage of 3.3V? Would it still meet the DC specifications as specified in the datasheet? According to the selectIO document, it says that <It is acceptable to have differential inputs such as LVDS and LVDS_25 in I/O banks that are powered at voltage levels other than the nominal voltages required for the outputs of those standards (1.8V for LVDS outputs, and 2.5V for LVDS_25 outputs).> However there are some criteria that have to be met (such as you can't use the differential terminating resistors etc), but there is nothing mentioned with regards to differential outputs.

Anyone has any idea whether this is possible?

Thanks in advance, and regards,

Andrea

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Scholar austin
Scholar
3,994 Views
Registered: ‎02-27-2008

Re: LVDS25 outputs using a Vcco of 3.3V

a,

 

LVDS is a standard.  If one claims to meet it, what it is powered from, is irrelevant,


Thus, any LVDS should be able to interoperate.  LVDS with 3.3v supplies to LVDS with a 1.8v swupply -- does not matter what the supply voltage is because LVDS is differenrial +/- 200 mV signalling with a 1.2v common mode level, which may be accomplishes with Vcco's from 1.5v to 3.3v (depending of course on the specification of the device:  one does not power a 2.5v LVDS with anything other than 2.5v and expect it to meet specification).

Austin Lesea
Principal Engineer
Xilinx San Jose
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