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Visitor phoebe_lu
Visitor
4,653 Views
Registered: ‎07-29-2016

MIG controller read-write to MT46H32M16 LPDDR

Hello.

I am using Spartan6 FPGA and now using the xilinx's mig controller to MT46H32M16 LPDDR. But after I wrote 521 numbers and read 521 numbers, and each number is 32bit,when I wrote more but the rd_data then suddenly changed to 0.And the write's cmd path(including address 、burst length and instr) and write's data path still are normal,the read's address is normal too. Any suggestions are welcome.

Thanks.  wr.jpgrd.jpg

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Xilinx Employee
Xilinx Employee
4,636 Views
Registered: ‎08-01-2008

Re: MIG controller read-write to MT46H32M16 LPDDR

check this ARs
http://www.xilinx.com/support/answers/43360.html
Thanks and Regards
Balkrishan
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Visitor phoebe_lu
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4,618 Views
Registered: ‎07-29-2016

Re: MIG controller read-write to MT46H32M16 LPDDR

Firstly I would like to thank you for providing the requested information and the suggestion.

I have read the related datasheet (Spartan-6 FPGA Memory Controller) previously,maybe just a cursory reading.Could you help me check my settings about addressing? Because I am not very sure about their correctness. The cmd_instr is 010 when it starts writing while reading its instr is 001,their cmd_bl is the same ,set to 3 and that means its burst length is 4.The addressing is increased 16 every at the positive of cmd_en(the port width is 32bit).Write and read have the same addressing increasing way,I think it can meet the requirements for Byte Address Alignment as the datasheet mentioned.Thanks a lot.   

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