We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Registered: ‎08-13-2016

MultiBoot Configuration from address not aligned to partitions caused by revision select Pins



we wanted to know if it is possible to load FPGA configuration file from addresses not aligned to partitions on configuration flash caused by revision select pins.

i.e. we have 32M configuration flash size and RS[1:0], then we can have 4 partitions of 8M each. if I have 1 configuration file of 8.8M then it will also occupy 0.8M of partition 2 (RS = 01). Is it possible to load 2nd FPGA configuration file from 0.8M offset of second partition or will we need to load the image from the base address of 3rd partition(RS = 10) ?


We are using ICAP instance for multiboot operation.


Thanks for your time.



0 Kudos