01-04-2015 06:14 PM
I am trying to do a Multiply and accumulation operation of 256 values. For this I have used 16 DSP48a macros, the ip core of Xilinx, Spartan 3A DSA FPGAs, each computing 16 MAC operations.
I have used (P+A*B) instruction to do the MAC operation. My implementation is correct before the MAC operation but it doesn't give the output.
is the problem with the IP core DSP48a macros?? Is my instruction (P+A*B) is correct for MAC operation?
please advise me.. thanks
01-04-2015 07:55 PM
01-06-2015 11:26 PM
Thanks for your valuable suggestion.
As you mentioned I have done with the multiplication (Instruction-->A*B). It gives ouput with global CE and global SCLR but I couldn't able to get the output for multiply and accumulate (MAC) operation... I have tried with all possible combination of CE and SCLR.
Can you please explain me about a CE and SCLR control signals in bit details?
I can able to get an exact output with the IP CORE of Multiply Accumulator version 2.0 but I couldn't able to get the ouput with dsp48a macro IPCORE.
The problem is with the control signals or instruction?? please advise me..
01-06-2015 11:30 PM - edited 01-06-2015 11:31 PM
You can find the control signal description from the below doc and check if you are driving them correctly
01-07-2015 12:39 PM