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Observer sarmad_wahab
Registered: ‎11-07-2016

Need help Regarding MIG 7 Series


         I am new to this community and familiar with FPGA and its languages (VHDL,VERILOG). I am facing some problem in MIG 7 Series Memory Controller. I designed MIG (DDR3 SDRAM) with core tool generator for (Artix 7). I just want to run example_design with Modelsim, to see how it works. I am following UG586.pdf manual and some readme.txt files for "how to achieve simulation". But I don't think so I am on right track. The Track I am following, correct me if I am wrong.

  • Running ise_flow.bat from folder (D:\Users\ARTIX 7\mig_7series_v1_9\example_design\par) through ISE Design command prompt. But I receive errors like (D:\Users\New_Artix_7\mig_7series_v1_9\example_design\par>if not exist exmple_top.ngc" (echo Failed in SYNTHESIS, echo Failed in MAP, echo Failed in PAR, echo Failed in Translate, echo Failed in BITGen)
  • After that I need to run create_ise.bat from ISE Design command prompt.
  • Next step would be run vsim(Modelsim) through ISE Design command prompt and change directory to sim folder and compile and files in rtl and sim folder. 
  • Next step would be to run compxlib for generation of unisim, secureip and unisims_ver libraries. Mapped them in modelsim.
  • Final step would be execute do sim.do command in modelsimprompt.

Am I right ? I am working on these things for last two weeks. I apologize if I sound newb.

Thanks in Advance

Sarmad Wahab

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3 Replies
Xilinx Employee
Xilinx Employee
Registered: ‎02-06-2013

Re: Need help Regarding MIG 7 Series



Yes after mapping the simulation libraries and running the sim.do file in the simulation directory should finish the simulation with out any issue's.


What is the error you are seeing following this flow?


which version of ISE and Modelsim are you using?



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Xilinx Employee
Xilinx Employee
Registered: ‎09-20-2012

Re: Need help Regarding MIG 7 Series

Hi @sarmad_wahab


You need to just compile libraries for Modelsim using compxlib in ISE and then follow the below steps



a) The user should invoke the Modelsim simulator GUI.

b) Change the present working directory path to the sim folder (ipcore_dir\ip_name\example_design\sim).
at Modelsim prompt, type the following command to
change directory path.
cd <sim directory path>

c) Run the simulation using sim.do file.
At Modelsim prompt, type the following command:
do sim.do

d) To exit simulation, type the following command at Modelsim prompt:
quit -f


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Observer sarmad_wahab
Registered: ‎11-07-2016

Re: Need help Regarding MIG 7 Series


       Thank you  for reply. I did the same, however I solved the issue just changed the language from VHDL to Verilog in MIG and made new project in ISE Design suite. Copied all the data and then simulation. Its working fine. Thank you :)

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