Need to convert debug UART to application uart in zync 7 and enable SPI0 and SPi1 in zync 7000
Dear Xilinx Community,
As am very newbie to zync 7000 platform & VHDL
1. I am using uart0 as debug port for uboot and linux kernel messages, I need to use two uarts in my application
Could you please let me know what are all the changes to be done to convert debug UART0 to application UART0 in bit stream, uboot, device tree, linux kernel and rootfs ?
2. I have some knowledge in vivdao and generating bit stream but I dont have knowledge on how to enable the controllers and do the connections. Could you please let me know how to enable an UART1, and mainly SPI0 and SPI1 controller ansd route it to EMIO pins, how to map the pins in the .xdc file to your desired location on do the correct connections in the top-level VHDL. Could you please provide with example with detailed explaination, so that I can ramp up easily.