07-18-2016 05:46 AM
I am working on a project and I'm having troubles finding the best system to solve the problem. My task is to build a wired optical communication system with a bit rate of at least 100 MBit/s, better would be 1 GBit/s. As Modulation scheme PPM (Pulse Position Modulation) is used. For first tests receiver and transmitter can be on the same board and therefore share the same clock.
Things I already have available are:
Laser + 10Gbit/s LN Intensity Modulator
10Gbit/s Linear Optical Receiver
What I need are:
- an ADC which can sample the signal I get from the receiver with at least 2 Gsps, more would be better. Resolution of the ADC does not really matter.
- an FPGA (or anything else) suitable for processing the data from the ADC (maybe something like the Zynq would be nice because there is also an ARM core available for other tasks). Best would be if the ADC is on the same board as the FPGA or can be easily connected to it.
- an FPGA (or anything else) to create the information signal for the modulator. I think the SERDES of an FPGA might be a good way to do this.
If someone of you has experience doing something like this I would appreciate any help.
07-18-2016 06:18 AM
Are you sure you need an ADC? I thought the whole point of PPM was that it was a digital signal. If you can just feed it to the FPGA transceivers directly then that avoids spending $2000 on a fancy ADC board.
Assuming you do need the ADC: there are a variety of FMC ADC cards available that'll sample fast enough for your needs. Some of these have already been tested with the ZC706, which is Xilinx's Zynq 7045 development kit. Others should work with any board that has suitable FMC ports, but check before you buy.
07-18-2016 09:41 AM
Thanks for the reply. Actually I don't need the ADC for PPM but for some other modulation schemes which are going to be tested once I managed to do the PPM. Sorry I did not mention this above. Probably I will leave it out for the beginning and add it later on if needed.
If there are any other suggestions please don't hesitate. You are also welcome if someone has an idea different from using an FPGA.